IMXRT1064 LVDS CLK input usage

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IMXRT1064 LVDS CLK input usage

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dbasilio83
Contributor II
Hello
Our query relates to the LVDS 'CCM_CLK1_P/CCM_CLK1_N' external clock input on the IMXRT1064. It states in the datasheet:
"One general purpose differential high speed clock Input/output (LVDS I/O) is provided. It can be used:
• To feed external reference clock to the PLLs and further to the modules inside SoC."
We would like to run the timer modules (GPT, TMR) on the IMXRT1064 off this external 100MHz LVDS clock, but run the ARM core clock off 600MHz that is generated from the external 24MHz crystal.
 
Our question is:
  1. Can one run the ARM core clock (AHB_CLK) unsynchronized from the peripheral bus clock (IPG_CLK) ? 
Thank you in advance
4 Replies

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victorjimenez
NXP TechSupport
NXP TechSupport

Hello Daniel,

Can one run the ARM core clock (AHB_CLK) unsynchronized from the peripheral bus clock (IPG_CLK)?

Unfortunately, is not possible to achieve this. However, if I understood correctly what you are looking for is to run the timer modules GPT, and TMR at a frequency of 100MHz, correct? If this is the case, then you don't need any external source clock, you can use the PLL's along with the frequency dividers to achieve this. 

I highly recommend you to use MCUXpresso Config Tools - Pins, Clocks, Peripherals to set the desired frequency on all your modules. This tool is integrated with MCUXpresso IDE, or you can download the standalone version from the following link. The clocks tool is for a graphical representation of the MCU clock tree system and interactive user controls as well as assistance with system fine-tuning.


Have a great day,
TIC

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dbasilio83
Contributor II

Hello Victor

The Config Tools - Pins, Clocks is very helpful. Thank you very much for the information.

I do, however, have another question relating to the LVDS 'CCM_CLK1_P/CCM_CLK1_N' reference input clock:

On page 1104 of the i.MXRT1064 reference manual, there is a description for the Analog ARM PLL control register (CCM_ANALOG_PLL_ARMn). BIT 16 of this register allows you to bypass the ARM PLL. BITS 15-14 allows you to choose the bypass CLK source (either LVDS CLK1 or 24MHz crystal/oscillator). We would like to use an external 24MHz LVDS CLK1 input as the reference clock to the ARM PLL, but we do not want to bypass the PLL. We want to generate a 600MHz core frequency from the CLK1 LVDS 24MHz input. The reason we want to do this is to synchronize the CORE to the rest of our system.

So, my question is:

1. If one uses an external 24MHz LVDS clock source as the input to pads 'CCM_CLK1_P/CCM_CLK1_N', then can the ARM PLL generate a 600MHz core clock frequency from this LVDS input instead of a 24MHz crystal/oscillator ? If yes, does this also hold for all the other PLL control registers (eg. PLL3 for USB) ?

The Clock Config tool in MCUXpresso indicates that you can do this, but the reference manual and datasheet are not clear about this.

Thank you in advance

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victorjimenez
NXP TechSupport
NXP TechSupport

Hello Daniel,

Regarding your question, it is possible to achieve what you mentioned.

Best Regards,

Victor

377 Views
dbasilio83
Contributor II

Thanks Victor