Hello, on the eval I.MXRT1011 i enabled the S/PDIF receiver but it locks just up to 88.2 kHz
How to lock spdif receiver at 96 kHz or 176.4 kHz
hello a colleague solved the problem setting IPG_CLOCK_ROOT to 125 MHz and now spdif receiver works up to 192 kHz
Could you please provide how are you testing this to see if I can replicate this on my side? Please note input frequency range and implications.
Hello Felipe, I got an external S/PDIF TX and connected the output on pin 6 - GND of T1 (not present ) see schematic SPF-45852_c.pdf then jumped J35 and J36.
Then assigned SPDIF IN of the eval board at GPIO_10.
When i send music i see the locked bit asserted SPDIF-SRPC (Phase config register) and i can get back the music from SPDIF OUT pin 6 - gnd of T2 ( not present ).
At 96 kHz and more the SPDIF-SRPC reports no lock and i cannot get back music.
Thank you for your reply. This has already been escalated with the RT applications team, I will provide an update as soon as there is some feedback.
Thank you Felipe! Any news?
The appropriate team has been contacted for testing and analysis, any update I will let you know.