I am following along an example project called "evkmimxrt1060_flexio3_pwm".
I am able to output a 90% duty cycle square wave in the range of 48MHz . I am suppose to output a 1.04kHz wave with a duty cycle of 90%.
Here is settings from the example project:
/* Select USB1 PLL (480 MHz) as flexio clock source */
#define FLEXIO_CLOCK_SELECT (3U)
/* Clock pre divider for flexio clock source */
#define FLEXIO_CLOCK_PRE_DIVIDER (4U)
/* Clock divider for flexio clock source */
#define FLEXIO_CLOCK_DIVIDER (7U)
#define DEMO_FLEXIO_CLOCK_FREQUENCY \
(CLOCK_GetFreq(kCLOCK_Usb1PllClk) / (FLEXIO_CLOCK_PRE_DIVIDER + 1U) / (FLEXIO_CLOCK_DIVIDER + 1U))
/* FLEXIO output PWM frequency */
#define DEMO_FLEXIO_FREQUENCY (48000U)
#define FLEXIO_MAX_FREQUENCY (DEMO_FLEXIO_CLOCK_FREQUENCY / 2U)
#define FLEXIO_MIN_FREQUENCY (DEMO_FLEXIO_CLOCK_FREQUENCY / 256U)
Here is the timer config that is in the example:
/* Configure the timer DEMO_FLEXIO_TIMER_CH for generating PWM */
fxioTimerConfig.triggerSelect = FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(0U);
fxioTimerConfig.triggerSource = kFLEXIO_TimerTriggerSourceInternal;
fxioTimerConfig.triggerPolarity = kFLEXIO_TimerTriggerPolarityActiveLow;
fxioTimerConfig.pinConfig = kFLEXIO_PinConfigOutput;
fxioTimerConfig.pinPolarity = kFLEXIO_PinActiveHigh;
fxioTimerConfig.pinSelect = DEMO_FLEXIO_OUTPUTPIN; /* Set pwm output */
fxioTimerConfig.timerMode = kFLEXIO_TimerModeDisabled;
fxioTimerConfig.timerOutput = kFLEXIO_TimerOutputOneNotAffectedByReset;
fxioTimerConfig.timerDecrement = kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput;
fxioTimerConfig.timerDisable = kFLEXIO_TimerDisableNever;
fxioTimerConfig.timerEnable = kFLEXIO_TimerEnabledAlways;
fxioTimerConfig.timerReset = kFLEXIO_TimerResetNever;
fxioTimerConfig.timerStart = kFLEXIO_TimerStartBitDisabled;
fxioTimerConfig.timerStop = kFLEXIO_TimerStopBitDisabled;
I have tried to change the clock dividers and also flexio clock select. I still can't get the frequency down below 1kHz. The lowest I have been able to go is 1.4kHz. This involved changing the FLEXIO_CLOCK_SELECT to 0U (which I think connects to PLL4 based on CCM_CDCDR_FLEXIO_CLK_SEL_SHIFT, which is 24MHz).
From what I have been able to find, it seems that the flexio clock I am using is derived from the pll3_sw_clk which is then derived from the Usb1PllClk. I can't find how they are configured though, or a way to connect the flexio to a different clock source that will get me below 1Khz.
If anyone can help me that would be appreciated. I am still new and learning!
Hi Ryan Cusack,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
To provide the fastest possible support, I'd like to you to utilize the MCUXpreeso to manage the clock configuration.