How much SRAM does the i.MX RT 1015 have?

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How much SRAM does the i.MX RT 1015 have?

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Specialist V

Hi All

Simple question which is answered in the data sheet:

pastedImage_1.png

But, when I try to configure its FlexRAM (which should have 4 banks of 32k each) I find that there are 8 banks and their default layout is the same a the RAM in the i.MX RT 1021, rather than 4 as in the i.MX RT 1011 - which indeed has 128k.

This means that I needed to use the same set up as I use on an i.MX RT 1021 since it would otherwise not work. And I have 256k of RAM to work in (and not the reported 128k).

Is the data sheet wrong or is my chip (on MIMXRT1015) strange???

Regards

Mark
[uTasker project developer for Kinetis and i.MX RT]

9 Replies

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NXP Employee
NXP Employee

Hi Mark,

Wanted to get back to you on this particular question. We are working on some documentation updates for this device.  In summary, the total memory used should be limited to 128K regardless of the blocks/banks used to configure the memory for 128K.  Our recommendation for your usecase would be to reconfigure the memory prior to jumping to the application so that the same memory blocks are used by the bootloader and app.

Regards,

Juan Mendoza

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Specialist V

Hello Juan

Thank your for the feedback and I will be watching out for documentation updates.

Maybe you could post here again when new documentation has been made available?

Thanks

Regards

Mark

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NXP TechSupport
NXP TechSupport

Hello Mark, 

The RT1015 has 128 KB 4 banks of 32 KB. In the reference manual section 10.4.18, you will see that the register IOMUXC_GPR_GPR17 which is to partition the RAM has the option for 4 banks only. 

Regards, 

Victor 

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128 Views
Specialist V

Hi Victor

I see that the reference manual shows just 4 banks for FlexRAM but that is the point which I don't believe. I can control 8 banks and I can allocate 256k of memory. Also the default (with eFUSE left as default) is 256k FlexRAM (ITC 64k, DTC 64, OCRAM 128k).

If you have an i.MX RT 1015 board you can do this without even loading a program to see that there is more memory than expected.

I have made  a video showing it [left memory view is ITC, middle is DTC and right is OCRAM] !
https://youtu.be/Zy_XlS3gijA

1. I connect with the board running in its boot ROM (by setting board switches to b0001). This is using eFUSE setting and I show that I can access 8 banks of 32k and I put in their "bank numbers" to show I can write and read (each bank being 32k in size - 0x8000).
2. Then I change the GPR17 setting to 0x5fa5 and enable this to show that it is the same as the default setting.
3. I then change the configuration to 0xdf15 and show that the last block of OCRAM moves to ITC (making it 96k in size)
4. I then change to 0xffa5 and you see that another bank of OCRAM moves to ITC (ITC is not 128k , DTC 64k and OCRAM 64k)
5. I set to 0xffaa and you see that I now have 4 banks of ITC, 4 banks of DTC and no OCRAM - 128k ITC/ 128DTC = 256 in all!!!!

What I have however learnt is that I can't allocate more than 128k to any of the memories (as i can do with an i.MX RT 1020) since if I do this it is not accessible (and lost).

Hopefully someone can repeat and confirm that the user's manual is not correct and that the can also use 256k of RAM (128 ITC and 128DTC) in the i.MX RT 1015). Certainly there are 8 banks that i can control in GPR17, whatever the user's manual states....

Therefore I can't allocate more than 128k to any bank but I can use 256k of physical memory.

Regards

Mark

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NXP TechSupport
NXP TechSupport

Hello Mark, 

I just confirmed with the design team. There is no error in the RT1015 documentation. We can only guaranty the use of the 128KB that we specified on the RM.

Regards, 

Victor 

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Specialist V

Hi

I am still using my i.MX RT 1015 for 256k internal RAM due to the fact that the flex RAM configuration won't work when 'assuming' that it has only 128k SRAM. It only works when configuring 8 banks, as would be the case for parts with 256k.

Here I have a loader which allows various forms of loading (encrypted and un-encrypted) with USB-MSD, Kboot, UART SREC (for RAM or for XiP applications and OTA)
https://www.utasker.com/iMX/RT1015.html

where the application shows the FlexRAm configuration used:
Hello, world... MIMXRT1015 [Power-on]
Static memory = 0x0000101c
OS Heap use = 0x02c9 from 0x7800
Initial stack margin 0x00027658
FlexRAM:
2 Code banks [0x00000000..0x0000ffff]           <- 64k
6 Data banks [0x20000000..0x2002ffff]                         <- 192k
uFileSystem integrity
OK
Enumerated (1)

When the application runs the board shows up as an external hard drive to the PC where the internal memory can be viewed:

pastedImage_1.png

The files contain a snap-shot of the complete internal (and SPI) memory and on the UART interface there is a memory monitor (with modification commands) and as far as I can see I can modify any of the 192k of DTC that the program has configured and its content is unique in memory.

Therefore, although it is maybe not guaranteed that the parts on the EVK have more that 128 RAM the fact that they seem to have means that it is not possible to use it correctly for work with a 128k part (since also the FlexRAM control needs to be set up for 256k to work correctly.

I am interested in obtaining an i.MX RT 1015 part that has 128k RAM so that the code can also be verified on it.

Regards

Mark

[uTasker project developer for Kinetis and i.MX RT]

P.S. Contrary to my statement previously that only 128k per RAM type can be allocated, that is not in fact true. It is possible to allocate and use more but the IDE that I am using (IAR) can't display the memory. The memory is usable by the program. In fact IAR has also errors when using the RT 1060 and 1064 since it refuses to display OCR FlexRAM as also discussed in https://community.nxp.com/thread/523631 

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NXP TechSupport
NXP TechSupport

Hi Mark, 

Sorry for the late response. At the beginning of your last reply you mentioned the following: 

I am still using my i.MX RT 1015 for 256k internal RAM due to the fact that the flex RAM configuration won't work when 'assuming' that it has only 128k SRAM. It only works when configuring 8 banks, as would be the case for parts with 256k.

What do you mean with the FlexRAM configuration won't work? Could you please give me more information about this? 

Regards, 

Victor 

128 Views
Specialist V

Victor

Since I still am convinced that my 1015 has 256k of RAM in it I will try to explain exactly the problem I have.

1 Starting with a 1020 (with 256k RAM) - and according to the FlexRAM application note - its default bank mapping (with default fuses) is as follows:

pastedImage_1.png

which means  64k ITC, 64k DTC and 128 OCR.

So I start my boot loader with its stack pointer towards the top of OCR (in bank 7).
The boot loader sees that the application that I want to run is between 64k and 96k in size and allocates 96k to ITC, 160k to DTC and 0 to OCR and reconfigures the memory for the application - which now looks like this:

pastedImage_2.png

This allows optimal program and data access (zero wait state sand no caching involved or needed) but there is another important point of the strategy. The last FlexRAM bank 7 is always used for by the main stack pointer, meaning that its data is retained and the application can post messages to be boot loader by writing these just above the stack pointer at the top of bank 7.

If I use the same strategy on my 1015 it works exactly as when I use it on my 1020. The boot loader can locate its stack at the top of OCR and the application can communicate with the boot loader.

2. Now I us my 1010, which really only has 128k RAM and the strategy is slightly different:

pastedImage_3.png

It has 4 banks (instead of 8) and the default layout (default fuse setting) is for 64k OCR, 32k DTC and 32k ITC.
However the last RAM bank is not in OCR but in ITC.

This means that the 1010 boot loader uses the ITC for its stack. Assuming it needs to start an application between 64k and 96k in size it reconfigures the flex RAM as follows:

pastedImage_4.png

The application code runs again in ITC and has 32k for its data (and stack) so that optimal speed is achieved.
Bank 3 always contains the stack and so the application and boot loader can communicate with each other.

Now the problem.
I can configure my 1015 to do exactly the same as the 1010 does - to use only 128k (4 flex RAM banks) and the boot loader and applications do run.

But they can no longer communicate with each other due to the fact that the 4 banks are also not ordered in their default use in the same way as the 1010. The boot loader and application have their stack pointers (and communication mailbox which is persistent across resets) in different flex RAM banks.

Since I can physically run programs that use more RAM that the device theoretically has and also it does start with 128k OCR (which shouldn't be possible according to its data sheet) it behaves exactly as a 1020's flex RAM does.

3. For completeness I can show the way that my 1050, 1060 and 1064 boards work (with 16 flex RAM banks), whereby their application/boot loader communication operates correctly since all matches with the data sheets (and flexRAM application note)

pastedImage_6.png
Assuming the application needs 352k ITC for its code the boot loader allocates this to ITC and 160k to DTC, whereby the main stacks (and communication mail box) are always in bank 15.

pastedImage_7.png

For conclusion, I expect that the 1015 has the same FlexRAM default as the 1010 (application note):

pastedImage_8.png

but practically it has the same as 1020 (application note):

pastedImage_10.png

which is only possile when it has 8 banks and thus 256k.

All of my tests show this to be the case! Since its default bank layout is also not as documented it is furthermore not possible to use just 4 banks and 128k with the general boot loader concept.

Regards

Mark

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Specialist V

Sorry to bring it up again but I just found that the i.MX RT 1015 user's manual actually shows the same FlexRAM setup as the 1.MX RT 1021's in its eFUSES which again corresponds with all practical tests.

 

mjbcswitzerland_0-1602071818608.png

 

 

Regards

Mark

 

 

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