Getting board SDRAM working with RT1050EVKB

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Getting board SDRAM working with RT1050EVKB

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michaelc77
Contributor II

My program has outgrown the internal RT1050 RAM and I need to use the external SDRAM on the EVK. I tried using the example FreeRTOS Hello World project as a known good. I am having issues with my project and the Hello World project. I either get hard faults or the program crashes at the clock configuration.

I followed the "Using the MIMXRT1050-EVK(B) with MCUXpresso IDE v10.2.1" to try and configure my project to use the SDRAM. I noticed that the SDRAM example that is used in the document is for linking only to the SDRAM. I need to store the project and flash and use the SDRAM as my main memory. I tried the stock linker script and also tried changing the addresses to 0x8xxxxxx instead of 0x4xxxxxx, since that is the location of the RAM in the MCU Settings menu.

There is probably some setting I am missing. Please let me know if something jumps out.

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maulesh
Contributor I

Hi @jeremyzhou @michaelc77 @w2vy 

I'm facing the same problem, using the LwIP stack. It was previously functioning flawlessly, allowing seamless pinging from other devices. However, after executing a code segment stored in the SDRAM, the Ethernet connectivity abruptly ceased to work. 

Can you please tell me that have you resolved the issue or not?

Please share your update on this also. 

'it seems that the memory management mechanism of LwIP is incompatible with the SDRAM"

Thanks

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w2vy
Contributor V

I am posting this for Micheal, since he is Moderated and that really slows things down...

(Who can fix that?)

Michael said:

Thanks for the help! The project does work fine with your instructions.

I moved these suggestions to my project that has LWIP and Ethernet enabled. The project is based off the "lwip_tcpecho_freertos" example to enable the PHY. With your above suggestions, the terminal outputs that it cannot initialize the PHY.

My first guess is that the SKIP_SYSCLK_INIT also skipped setting the clock to the PHY.

If I disable the "SKIP_SYSCLK_INIT" in the processor, the program hard faults on return from BOARD_BootClockRUN(); The "evkbimxrt1050_freertos_hello" project exhibits this same behavior.

What can you suggest for getting the PHY enabled correctly too?

Thanks

Tom/Michael

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jeremyzhou
NXP Employee
NXP Employee

Hi

Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
The evkbimxrt1050_sdram_init file is used to initialize the SDRAM when debugging the demo project in the Keil, I find the evkbimxrt1050_freertos_hello is based on MCUXpresso, definitely, the evkbimxrt1050_sdram_init file is not fit it, so please follow the below steps to use the SDRAM as major RAM.
1. Add the XIP_BOOT_HEADER_DCD_ENABLE=1

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2. Modify the memory assignment

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2. Modify the extra linker script input sections

pastedImage_3.png

Have a great day,
TIC

 

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8,585 Views
michaelc77
Contributor II

Hi jeremyzhou

I attached the unmodified and modified version of the LWIP/FreeRTOS Ping example provided NXP. I followed your instructions to enable the SDRAM. The unmodified version works fine and pings our gateway server (192.168.0.1). The modified version, only modifying the settings per your instructions, the packets are dropped while the code is running.

Since I am using LWIP in my final application, this example is a little more applicable for my situation. Please let me know if you have any advice.

Thank you,

Mike Cooke

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jeremyzhou
NXP Employee
NXP Employee

Hi Mike,

After digging deeper, I find that evkbimxrt1050_lwip_ping_freertos_SDRAM can work property after disabling the Cache feature via the comment out the below code in the BOARD_ConfigMPU(void);, please give a try.
    MPU->RBAR = ARM_MPU_RBAR(8, 0x81E00000U);
    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 1, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_2MB);

    /* Enable MPU */
    ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);

    /* Enable I cache and D cache */
    //SCB_EnableDCache();
    //SCB_EnableICache();

Have a great day,
TIC

 

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michaelc77
Contributor II

Hi Jeremy,

That fixed it! Thank you for looking into that!

I found a forum post (RT1020-EVK: FreeRTOS + USB + SDRAM = HardFault ) that uses the lwip_httpscli_mbedTLS_freertos and SDRAM. I checked BOARD_ConfigMPU(void) and the cache is enabled. Is there a way to run this with the cache enabled? 

Thanks,

Mike

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jeremyzhou
NXP Employee
NXP Employee

Hi Mike,

Yes, I've replicated the phenomenon you mentioned.
And after digging deeper, I suspect the phenomenon is related to memory management of LwIP, it seems that the memory management mechanism of  LwIP is incompatible with the SDRAM, I'll contact with the AE team for confirming this suspicion and reply to you late.

Have a great day,
TIC

 

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jeremyzhou
NXP Employee
NXP Employee

Hi Mike,

Thanks for your reply,
I'd like to replicate the phenomenon you mentioned and reply to you later.

Have a great day,
TIC

 

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