Flash Problem When FlexSPI SCK Set to Free-Running

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Flash Problem When FlexSPI SCK Set to Free-Running

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whermann
Contributor II

I have a custom board with an MIMXRT1011, AT25SF128A flash, and an FPGA. The QSPI flash and FPGA are both connected to the MCU's FlexSPI pins. The system is working fine and I can access the flash and FPGA with AHB commands, but it will make the digital design much simpler on the FPGA side if I can have SCK free-running and use this as a reference clock to the FPGA. This use-case is explicitly mentioned in §25.6.6 of the Reference Manual, but when I set the MCR0[SCKFREERUN] bit the processor halts and the dubugger throws an error "Break at address "0xfffffffe" with no debug information available, or outside of program code."

I am assuming that this is due to some timing violation with the flash and I have played with the CS setup and hold time values (TCSH, TCSS), but am unable to get it to work.

Here is the FlexSPI configuration code for both the flash and FPGA: 

void flexspi_nor_flash_init(FLEXSPI_Type *base)
{
    flexspi_config_t config;
    fpgaInfo.imgErased = 0;
    flexspi_validate_fpga_images();

#if defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
    bool DCacheEnableFlag = false;
    /* Disable D cache. */
    if (SCB_CCR_DC_Msk == (SCB_CCR_DC_Msk & SCB->CCR))
    {
        SCB_DisableDCache();
        DCacheEnableFlag = true;
    }
#endif /* __DCACHE_PRESENT */

    flexspi_clock_init();

    /*Get FLEXSPI default settings and configure the flexspi. */
    FLEXSPI_GetDefaultConfig(&config);

    /*Set AHB buffer size for reading data through AHB bus. */
    config.ahbConfig.enableAHBPrefetch    = true;
    config.ahbConfig.enableAHBBufferable  = true;
    config.ahbConfig.enableReadAddressOpt = true;
    config.ahbConfig.enableAHBCachable    = true;
    config.rxSampleClock                  = kFLEXSPI_ReadSampleClkLoopbackInternally;
    config.enableSckFreeRunning           = true;
    FLEXSPI_Init(base, &config);

    /* Configure flash settings according to serial flash feature. */
    FLEXSPI_SetFlashConfig(base, &flexspi_flash_config, kFLEXSPI_PortA1);

    /* Configure FLEXSPI B1 for FPGA communication */
    FLEXSPI_SetFlashConfig(FLEXSPI, &flexspi_fpga_config, kFLEXSPI_PortB1);

    /* Update LUT table. */
    FLEXSPI_UpdateLUT(base, 0, customLUT, CUSTOM_LUT_LENGTH);
    FLEXSPI_UpdateLUT(FLEXSPI, CUSTOM_LUT_LENGTH, fpgaLUT, FPGA_LUT_LENGTH);

    /* Do software reset. */
    FLEXSPI_SoftwareReset(base);

#if defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
    if (DCacheEnableFlag)
    {
        /* Enable D cache. */
        SCB_EnableDCache();
    }
#endif /* __DCACHE_PRESENT */
}

 The error (bus fault) occurs when the line FLEXSPI_UpdateLUT(FLEXSPI, CUSTOM_LUT_LENGTH, fpgaLUT, FPGA_LUT_LENGTH); is executed.

I am hoping that this is just a setting issue and not some fundamental reason the flash SCK can't free-run. Any suggestions would be appreciated.

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victorjimenez
NXP TechSupport
NXP TechSupport

Hello, 

The problem is that the flash memory doesn't support the free-running feature. The RT1010 devices only have one FlexSPI interface. So, you only have one control register. This means that all the devices that you connect to this interface must work under the same timing parameters, which is not your case. To overcome this, you need to use an RT that has two FlexSPI interfaces, which is the case of the RT1060.

Regards,
Victor 

 

 

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victorjimenez
NXP TechSupport
NXP TechSupport

Hello, 

The problem is that the flash memory doesn't support the free-running feature. The RT1010 devices only have one FlexSPI interface. So, you only have one control register. This means that all the devices that you connect to this interface must work under the same timing parameters, which is not your case. To overcome this, you need to use an RT that has two FlexSPI interfaces, which is the case of the RT1060.

Regards,
Victor 

 

 

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