Hi,
I'm debugging QSPI between R1166 (Master) and FPGA (Slave).
I use MCUXpresso IDE with SDK: SDK_2_13_0_MIMXRT1160-EVK (board - MIMXRT1160-EVK).
I use modified example (SDK_2_13_0_MIMXRT1160-EVK/boards/evkmimxrt1160/driver_examples/flexspi/nor/edma_transfer/cm7/). Modifications: changed FLEXSPI1 to FLEXSPI2, created my own LUT.
Transactions: write buffer (128 bytes), then read buffer (128 bytes). Using logic analyzer, I can see that data is correct. Also, reading via AHB bus works properly. But call of function flexspi_nor_read_data() returns broken data. Data should be an increment from 0 to 0x7F, but really looks like 8 bytes added to buffer, 8 lost, 8 added, 8 lost, etc. So, second half of buffer is trash.
Below is a screenshot from log, where 1-st buffer is data received from flexspi_nor_read_data(), and 2-nd - reading via AHB (copy from FlexSPI2_AMBA_BASE):

s_fpga_read_buffer is located in non-cacheble section.
Could you please help me where I can search bug? Is it DMA side or FLEXSPI?