Error to generate sb file using elftosb for IMXRT10xx

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Error to generate sb file using elftosb for IMXRT10xx

1,269 Views
binhu
Contributor II

We want to put the program in the QSPI Flash link to the Flexspi bus and let the BootROM to load the code and data into the SDRAM on SEMC. Now the program is running OK when debugging by loading into the SDRAM by JLink.

But we met with a lot problems when generating the bin and sb file using elftosb tool. 

First, windows version of elftobs crash.

Second, the linux version of elftobs can run, but when I try to generate the bin file, the result bin file is too big around 2GB. and When I generate the bs file, the tool through out and error "error std::bad_alloc"

How can I solve this problem?

0 Kudos
3 Replies

1,061 Views
jay_heng
NXP Employee
NXP Employee

You can also try this tool, with this tool, You can flash bare image into various boot devices easily and don't need to care about headers (ivt, boot data...)

GitHub - JayHeng/nxp-sec-boot-ui: A one-stop GUI tool to work with NXP MCU (Kinetis, i.MXRT, LPC) RO... 

0 Kudos

866 Views
JamesNgo
Contributor III

Thanks.

I tried using the sdphost to load flashloader firmware to RAM:

>sdphost.exe -u 0x1fc9,0x0145 -V -- write-file 0x20205800 ".\ivt_flashloader.bin"
>sdphost.exe -u 0x1fc9,0x0145 -V -- jump-address 0x20205800

Then blhost to configure NOR flash:

>blhost.exe -u 0x15a2,0x0073 -- fill-memory 0x2000 4 0xC0000007
>blhost.exe -u 0x15a2,0x0073 -- configure-memory 9 0x2000

Does the "configure-memory 9" operation  from RAM flashloader firmware above configure the NOR flash to Quad mode (ISSI external Flash IS45S16160J) and this  needs to happen ONLY one-time during manufacturing if the same operation is used (set Quad Enable SerialNorQuadMode_StatusReg1_Bit6)? Thanks.

 

and blhost to perform the following 

0 Kudos

1,063 Views
igorpadykov
NXP Employee
NXP Employee

Hi Hu

elftosb usage can be found in appnotes available on

i.MX RT1050 MCU/Applications Crossover Processor | Arm® Cortex®-M7 @600 MHz, 512KB SRAM |NXP 

https://www.nxp.com/docs/en/user-guide/KBLELFTOSBUG.pdf 

It may crash if it encounters code in an area not expected.

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------