Errata ERR050577, SDRAM Burst Length

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Errata ERR050577, SDRAM Burst Length

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jaredm
Contributor III

Hi, I am looking for additional details on Errata ERR050577. I am working on the RT1052. If I follow the recommendation of the Errata, the burst length is configured as 1 and there will be significant SDRAM performance reduction.

Is there a different workaround for this Errata that allows burst length > 1? What if SDRAM3[UT] (Refresh urgent threshold) and/or STDRAM[RT] (Refresh timer period) values are reduced?

Thanks in advance.

 

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FelipeGarcia
NXP TechSupport
NXP TechSupport

Hi Jared,

Unfortunately, there are no specific regulations to avoid this errata. The only requirement to avoid the errata effect is to set the burst length to 1.

Best regards,

Felipe

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FelipeGarcia
NXP TechSupport
NXP TechSupport

Hi Jared,

Unfortunately, there is no other workaround documented that can allow you to use burst length > 1. Sorry for the inconvenience.

Best regards,

Felipe

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jaredm
Contributor III

Hi Felipe,

Is there a way to determine whether the error condition can occur? Or common problem cases? For example, large DMA transfers?

The reason I ask is because my application may avoid the error condition. I am not using DMA. My application does image processing on 5MP images, so the CPU is moving large amounts of data in/out of SDRAM. If burst=1, it may decrease performance significantly.
 
Thanks,
jaredm
 
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FelipeGarcia
NXP TechSupport
NXP TechSupport

Hi Jared,

Unfortunately, there are no specific regulations to avoid this errata. The only requirement to avoid the errata effect is to set the burst length to 1.

Best regards,

Felipe