ENET2 RMII Ref Clk

[jautry]

I am using both macs on an MIMXRT1062 in RMII mode and need to know if I can use only the Enet clock output from one of the macs to both phys or do I need to run both clock outputs to their respective phys.  The clock will be set to 50mhz.

[jautry]

The last question I had was concerning using the MIMXRT device for the phy reference clock source.  Is this clock source stable (clock jitter) within the 50ppm required by most phy devices?

[jeremyzhou]

Hi,
Thanks for your reply.
1) Is this clock source stable (clock jitter) within the 50ppm required by most PHY devices?
-- In my opinion, it's able to do it.
Have a great day,
TIC

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[jeremyzhou]

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
According to your statement, you want to use the ENET module to connect multi PHY chips, and these PHY chips not only share the MDIO and MDC pins but also share the same reference clock.
Is my understanding right? If yes, I think it's available to do it, however, you'd better contact the PHY chip manufacture for confirming.
Have a great day,
TIC

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[nickwallis]

You need to route both clocks (enet_tx_clk and enet2_tx_clk) individually to each PHY.

-Nick

[jautry]

Are these clocks able to provide the 50ppm stability required by most phys?