Diffrent between pin configuration

[ronen]

I working with i.MX RT1166 . 

But I am not sure about the GPIOs pin configuration. For example the pin GPIO_DISP_B2_11 :

If I want to configure it as GPIO5 pin 12 ,I understand that I should use this configuration :

IOMUXC_SetPinMux(IOMUXC_GPIO_DISP_B2_11_GPIO_MUX5_IO12, 0U);

But if I want to configure it as GPIO11 pin 12  I should use this configuration :

IOMUXC_SetPinMux(IOMUXC_GPIO_DISP_B2_11_GPIO11_IO12, 0U);

why GPIO5 configured as GPIO_MUX and not as GPIO  like GPIO 11  ?

Can I get IRQ on this pin under CM7 core ?  ( GPIO5_Combined_0_15_IRQHandler)

Thanks

[CarlosGarabito]

Hi @ronen , The best description of MUX is in this diagram on reference manual.  The IOMUX cell is required whenever two or more functional modes are required for a specific pad or when one functional mode and the one test mode are required.

The manager for interrupts in CM7, these qualified outputs are OR'ed together to generate two one-bit interrupt lines:
• Combined interrupt indication for GPIOx signals 0 - 15
• Combined interrupt indication for GPIOx signals 16 - 31