DSB macro usage in ENET_DriverIRQHandler()

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DSB macro usage in ENET_DriverIRQHandler()

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simon_walke
Contributor II

In ENET_DriverIRQHandler() the DSB fix for ARM errata 838869 appears twice in a row.

I have two questions:

1) Why is this Data Synchronisation Barrier required twice in succession ?

2) Why isn't the Cortex M7 included in this fix ?

void ENET_DriverIRQHandler(void)
{
ENET_CommonFrame0IRQHandler(ENET);
/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
exception return operation might vector to incorrect interrupt */
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
exception return operation might vector to incorrect interrupt */
#if defined __CORTEX_M && (__CORTEX_M == 4U)
__DSB();
#endif
}

For reference, here's another place where this errata is addressed in Interrupts.c, but the M7 is explicitly handled as well here...

void GPT2_IRQHandler(void)
{
//USER_LED_TOGGLE();

/* Clear interrupt flag.*/
GPT_ClearStatusFlags(GPT2, kGPT_OutputCompare1Flag);

gptIsrFlag = true;
interrupt_counter++;

if(installed_int_handler)
{
installed_int_handler();
}

/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F, Cortex-M7, Cortex-M7F Store immediate overlapping
exception return operation might vector to incorrect interrupt */
#if defined __CORTEX_M && (__CORTEX_M == 4U || __CORTEX_M == 7U)
__DSB();
#endif

}

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi,

First of all, sorry for the later reply.

I checked the ARM Cortex M7 errata file and couldn't find errata ID 838869.

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Thank  you for the attention.


Have a great day,
Mike

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simon_walke
Contributor II

Thank you Mike.

But this raises a further question: if 838869 is never mentioned for M7, what is the fix that is applied in GPT2_IRQHandler() ? (see second code snippet in my original post)

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi Simon,

Yes, I saw the void GPT2_IRQHandler(void) function with Cortex-M7.

While, could you guide me where the void GPT2_IRQHandler(void) function located (which c code)?

Thanks.

best regards,

Mike

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simon_walke
Contributor II

Mike, the function GPT2_IRQHandler() is in Interrupts.c, thanks !

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi Simon,

Thanks.

While, I don't find <interrupt.c> file form current i.MXRT1060 product MCUXPresso SDK software package.

Could you guide which software package you are using?

best regards,

Mike

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simon_walke
Contributor II

Mike, I apologise that I did not provide full information !

Here is the result of grep for 838869.*Cortex.M7 in my SDK_2.4.1_EVK-MIMXRT1064 source tree

boards\evkmimxrt1064\driver_examples\gpt\timer\gpt_timer.c

boards\evkmimxrt1064\driver_examples\rtwdog\rtwdog.c

So this ARM errata has been patched in 2 places in this codebase. If it is applicable, then do we need to apply it in other places as well ?

Thanks !

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi Simon,

First of all, sorry for the later reply.

I got the feedback from MCUXpresso SDK software team that:

I will have a check EXAMPLE_GPIO_IRQHandler,  it is hard to reproduced the issue actually. For no requirement to add "__DSB()" for it, I will not change it. 

For the interrupt source is SW8 in the SCH, it need human to press and release the switch, and the period between "press" and "release" is always longer than 300ms.  so hard to reproduced. So far, I can't get any reason to add __DSB() for it. 

You mentioned issue could not be regenerated by MCUXpresso SDK software team and it is not necessary to add __DSB() code.

Thanks for the attention.

Have a great day,
Mike

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi Simon,

I will check this issue with MCUXpresso SDK software team.

I will let you know when there with any feedback. Thanks for the patience.


Have a great day,
Mike

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