Choosing between ITCM and DTCM on IMXRT

cancel
Showing results for 
Search instead for 
Did you mean: 

Choosing between ITCM and DTCM on IMXRT

Jump to solution
1,204 Views
jaldridge
Contributor II

I believe that ITCM can be used for R/W variables as well as code. Similarly DTCM be used for code as well as R/W variables. I assume that code, (and const data?), should be placed in ITCM and R/W variables should be placed in DTCM. Is there a simple guide that illustrates why this is so? I'd be interested to know why R/W variables shouldn't be put in ITCM or why code shouldn't be put in DTCM.

Thanks

John

Labels (4)
Tags (4)
1 Solution
470 Views
takashi_kashiwa
Senior Contributor I

Hi John

Is there a simple guide that illustrates why this is so? I'd be interested to know why R/W variables shouldn't be put in ITCM or why code shouldn't be put in DTCM.

The best performance is achieved by placing the instruction in ITCM and the data in DTCM.

Cortex-M7 is equipped with a superscalar. Because of this, Cortex-M7 partially processes instructions simultaneously. Therefore, ITCM and DTCM have different I / F bit widths and numbers.

The connection between ITCM, DTCM and CPU (TCU) is as follows:(The access bit width of ITCM is 64 bit * 1, and the access bit width of DTCM is 32 bit * 2.)

fig01.png

バスアーキテクチャ|Cortex-M7編 

If you want to know more info, Please confirm "Arm Cortex-M7 Processor Technical Reference Manual 5.8. TCM interfaces.(http://infocenter.arm.com/help/index.jsp?lang=en)

RM describes that

The Prefetch Unit (PFU) can fetch instructions from any of the TCM interfaces. The Load Store Unit (LSU) and the AHBS interface can each read and write data using any of the TCM interfaces. Best performance is achieved if code is placed in ITCM and data in DTCM. However, there is no functional restriction in which TCM, code and data is placed.

Best Regards,

T.Kashiwagi

View solution in original post

2 Replies
471 Views
takashi_kashiwa
Senior Contributor I

Hi John

Is there a simple guide that illustrates why this is so? I'd be interested to know why R/W variables shouldn't be put in ITCM or why code shouldn't be put in DTCM.

The best performance is achieved by placing the instruction in ITCM and the data in DTCM.

Cortex-M7 is equipped with a superscalar. Because of this, Cortex-M7 partially processes instructions simultaneously. Therefore, ITCM and DTCM have different I / F bit widths and numbers.

The connection between ITCM, DTCM and CPU (TCU) is as follows:(The access bit width of ITCM is 64 bit * 1, and the access bit width of DTCM is 32 bit * 2.)

fig01.png

バスアーキテクチャ|Cortex-M7編 

If you want to know more info, Please confirm "Arm Cortex-M7 Processor Technical Reference Manual 5.8. TCM interfaces.(http://infocenter.arm.com/help/index.jsp?lang=en)

RM describes that

The Prefetch Unit (PFU) can fetch instructions from any of the TCM interfaces. The Load Store Unit (LSU) and the AHBS interface can each read and write data using any of the TCM interfaces. Best performance is achieved if code is placed in ITCM and data in DTCM. However, there is no functional restriction in which TCM, code and data is placed.

Best Regards,

T.Kashiwagi

View solution in original post

470 Views
jaldridge
Contributor II

Hi Takashi

Thank you for this answer. I understand this a bit better now. I'm

getting used to where to find information, between NXP and ARM documents.

Best Regards

John Aldridge

John Aldridge CEng MIET - Senior Design Engineer - Direct: +44 1903 737353

- Fax: - E-Mail: JAldridge@parker.com

Parker Hannifin Manufacturing Ltd - Electromechanical & Drives Division

Europe - New Courtwick Lane ? Littlehampton? West Sussex, UK ? BN17 7RZ

Phone.: + 44 (0)1903 737000 - Fax: + 44 (0)1903 737 123

Parker Hannifin Manufacturing Ltd - Registered in London no 4806503

Registered Office - Parker House ? 55 Maylands Ave ? Hemel Hempstead ? HP2

4SJ ? United Kingdom

www.parker.com/eme