About i.MX RT1050 FlexRAM Allocation

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About i.MX RT1050 FlexRAM Allocation

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Contributor II

Hello !

I'm using MCUXpresso with MIMXRT1050-EVK(SDK Version : 2.3.0)

I have a two questions.

First,are ram allocation sample is available?

It is not on the list in my environment(but it exists in the folder)

スクリーンショット 2018-01-28 13.35.03.png

It has not been added to manifest xml files.

The second is about FlexRAM  registers.

FlexRAM ram allocation sample  uses magic number register.

but It is not shown in the reference manual.

スクリーンショット 2018-01-28 1.39.00.png

and the part of the magic number match flag is also reserved.

スクリーンショット 2018-01-28 13.42.14.png

スクリーンショット 2018-01-28 1.50.50.png

Are the above problems fixed?

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NXP TechSupport
NXP TechSupport

Hello,

  Customers can look at fsl_flexram.c file in the SDK.

Regards,

Yuri.

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NXP TechSupport
NXP TechSupport

Hello,

  The FlexRAM is configurable. Refer to GPR16 General Purpose Register

(IOMUXC_GPR_GPR16) and GPR17 General Purpose Register (IOMUXC_GPR_GPR17).

 

  Also, the following may be helpful.

"Using the i.MX RT FlexRAM"

https://www.nxp.com/docs/en/application-note/AN12077.pdf 

Overview of using the MIMXRT1050-EVK with MCUXpresso IDE 


Have a great day,
Yuri

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Contributor II

Thanks for Replying

I try to set (IOMUXC_GPR_GPR16) and GPR17 General Purpose Register, but debug is fault

スクリーンショット 2018-02-04 22.02.44.png


I tried with the following code

#define IOMUXC_GPR_GPR17_ADDR 0x400AC044
#define IOMUXC_GPR_GPR16_ADDR 0x400AC040

SCB_DisableICache();
SCB_DisableDCache();

volatile unsigned int *b = ((unsigned int *)IOMUXC_GPR_GPR17_ADDR);
*b = 0b01011010111111111111111110100101;
volatile unsigned int *a = ((unsigned int *)IOMUXC_GPR_GPR16_ADDR);
*a |= 1<<2;

And,It is helpful to have sample code about this case in the manual

スクリーンショット 2018-02-04 22.07.02.png

I need some advice .

thanks

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NXP TechSupport
NXP TechSupport

Hello,

  Customers can look at fsl_flexram.c file in the SDK.

Regards,

Yuri.

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