iMXRT1170 very high GPT Input Capture jitter (100s of clock cycles)

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iMXRT1170 very high GPT Input Capture jitter (100s of clock cycles)

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erling
Contributor III

Hi. We are using the Input Capture functionality of a GPT to timestamp sensor measurements. The input signal has a period of 2.5ms and I have measured it with other devices and confirmed that it is stable and has low jitter.

When I connect this to an Input Capture channel of a GPT I am getting mostly a regular stream of interrupts where the Input Capture intervals are as expected with a +/- 1-3 clock cycles jitter/variance. This is acceptable and expected. However, we also get, several times per second, huge outliers. It always starts with an Input Capture interval that is much higher than expected (sometimes it is more than 1000 clock cycles too big). This is followed by a corresponding Input Capture interval that is equally shorter. 

Here is a log from running the test
```
Got IC=662763230 Diff=12
Got IC=663013243 Diff=13
Got IC=663263256 Diff=13
Got IC=663513268 Diff=12
Got IC=663763281 Diff=13
Got IC=664013294 Diff=13
Got IC=664263306 Diff=12
Got IC=664513319 Diff=13
Got IC=664763332 Diff=13
Got IC=665013382 Diff=50
Got IC=665263353 Diff=-29
Got IC=665513370 Diff=17
Got IC=665763383 Diff=13
Got IC=666013395 Diff=12
Got IC=666263408 Diff=13
Got IC=666513421 Diff=13
Got IC=666763434 Diff=13
Got IC=667013446 Diff=12
Got IC=667263459 Diff=13
Got IC=667514227 Diff=768
Got IC=667764535 Diff=308
Got IC=668013493 Diff=-1042
Got IC=668263510 Diff=17
Got IC=668513523 Diff=13
Got IC=668763993 Diff=470
Got IC=669013544 Diff=-449
``` 
Here IC is the Input Capture value read out from the GPT. Diff is the difference between the interval between two consecutive Input Capture values and the expected (which is 250000 clock cycles, 2.5ms).

As you can see there is a drift offset between the NXP and the sensor, which constitutes around 13CCs per 2.5ms. But notice all the huge outliers. This is very surprising and completely unacceptable. This is hardware timestamping and should not have more than a clock cycle of jitter.

Do you have any advice on how to debug this? Could it be related to the IOMUXC settings currently we are doing:
```


/* Convenience function so that both calls to SetPinMux and SetPinConfig can
* be done on one line without repetition
*/
static void SETUP(uint32_t muxRegister,
uint32_t muxMode,
uint32_t inputRegister,
uint32_t inputDaisy,
uint32_t configRegister,
uint32_t inputOnfield,
uint32_t configValue) {

*((volatile uint32_t*) muxRegister) =
IOMUXC_SW_MUX_CTL_PAD_MUX_MODE(muxMode) | IOMUXC_SW_MUX_CTL_PAD_SION(inputOnfield);

if (inputRegister != 0UL) {
*((volatile uint32_t*) inputRegister) = inputDaisy;
}
if (configRegister != 0UL) {
*((volatile uint32_t*) configRegister) = configValue;
}
}
SETUP(IOMUXC_GPIO_AD_12_GPT1_CAPTURE1, 1, AD_PULL_DOWN + AD_DRV_NORM + AD_SLEW_SLOW);

```

However, this seems way to big of a jitter to be due to muxing latency? Is there an errata for IMXRT1170?

Thank you

 

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1 Solution
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erling
Contributor III

Here is the content of the GPT registers:

erling_0-1701971933167.png

 

 

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3 Replies
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erling
Contributor III

Hi. I am sorry for the confusion. This turned out to be hardware issue on our PCB. Thanks for your assistance.

 

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789 Views
Kan_Li
NXP TechSupport
NXP TechSupport

Hi @erling ,

 

The parameters input to SETUP() are less than what you defined , is this a typo issue? 

 

Have a great day,
Kan


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erling
Contributor III

Here is the content of the GPT registers:

erling_0-1701971933167.png

 

 

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