iMXRT1052 LCDIF TxOverflow situation

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iMXRT1052 LCDIF TxOverflow situation

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mark82
Contributor III

Hello everyone. 

I'm working on a custom board based on iMXRT1052 with TFT panel. 

I'm encountering the problem of Fifo TxOverflow in the LCDIF peripheral. I'm sure of that because I enable that interrupt to occur. 

Other info on my board.

- external SDRAM chip running at 133Mhz

- same problem on several TFT sizes (and pix_clocks from 9Mhz to 54Mhz)

- I'm using LVGL library, FreeRTOS 10.4 Patch 2

 

Can anyone advise on how I could avoid that or at least recover from that?

 

Thanks.

 

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EdwinHz
NXP TechSupport
NXP TechSupport

Hi @mark82,

The overflow interruption occurs when the block has requested more data than it's FIFOs could hold. This could be due to an issue with the different domain clocks, as the TXFIFO is split between the two:

EdwinHz_0-1721425514420.png

Change the BUS CLOCK and DISPLAY CLOCK frequencies to better match one another.

BR,
Edwin.

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mark82
Contributor III

Thanks for your reply. Can you provide details? 

I have constraints on LCD side for clock, due to TFT panel specs.

And I don't want to lower the AXI bus clock frequency. 

 

Thanks.

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