Hi,
Greetings!
Have been trying to get ADC ETC DMA working with multiple channels. In this context, I came across
#define DEMO_ADC_ETC_CHAIN_LENGTH 1U /* Chain length is 2. */
in the adc_etc_hardware_trigger_conv example.
Now, I am confused by the term "Chain Length".
What does this mean and imply ?
Is this something like an ADC Conversion SEQUENCE's Count or iow a differently named SEQUENCE Length ?
Logically, it kind of implies something like that to me, but I am quite confused with the way the Reference Manual is written. Like a tongue twister, maybe a brain twister probably ?
So less information the reference manual conveys, despite the large number of pages!
Can someone help please..
Thanks,
Manu
Solved! Go to Solution.
Hi Manu,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
The chain length means how many ADC conversion will happen in sequence when an ADC trigger request is granted.
Hope this is clear.
Have a great day,
TIC
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Hi Manu,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
The chain length means how many ADC conversion will happen in sequence when an ADC trigger request is granted.
Hope this is clear.
Have a great day,
TIC
-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!
- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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HI Jeremy,
Thanks! I get it now.
The magical missing keyword: "Trigger SEQUENCE" length. That would replace an entire sentence, requiring more further explanation.
That helped.
Thanks,
Manu