iMX RT1020EVK - MIMXRT1021DAG5A question,
In. SDK SDRAM example, csx,0 & RDY pin at Rouning Details, is below
In SDK tcp/ip example, MDIO & MDC pin at Rouning Details, is below. and it use same gpio pin
So. I checked the schemetics of 1020EVK board. and Hardware Development Guide app.note
curiously, In schemetics, GPIO_EMC_40,GPIO_EMC_41 pins connected only with ENET part, and I can not find any connection SEMC 2 pin (csx0, rdy)
In this schemetics, pin direction is also not same with tcp/ip example routing, what is wrong?
I have to use SDRAM and Ethernet, csx,0 & RDY for SEMC(forSDRAM) no need to rout also in software? then what is the purpose of this csx0, RDY ? why In exameple this two pins are routed?
and If I connect 116,115 pins to ENET_MDIO,MDC , according to direction, which configuration of direction is Ok ?
If I do rout like this, (ENET_MDIO,MDC - 115,116 ) ,(csx,0 & RDY - 91,92 (another routable pins) ),
, but... 91, 92 pin is also connected to WM8960, SAI1_MCLK, SAI1_TX_BCLK in schemetics of board
Please Let me know.
Hello
I hope you are well.
If you are using one SDRAM then RDY and CSX0 are unused. CSX signal is used for chip select if another SDRAM/memory is used while RDY is for NAND memory.
Best regards,
Omar
