iMX RT1010 has only 2-way UART_CLK_SEL, but ConfigTools/SDK offers a 3-way mux

[benedek_kupper]

I wanted to change the UART clock input so the PLL3 could be disabled. So I went ahead and chose PERCLK_CLK_ROOT in the clock tree configurator (MCUXpresso IDE v11.2.1 [Build 4149] [2020-10-07]). It broke all UART connections completely. I had to do a lot of digging to find in the reference manual that this chip has actually a 2-way clock mux (PLL3_SW / 6 or OSC_CLK), there's nothing connected on the 3rd mux input.

This is clearly a bug in the ConfigTools and in the SDK (or in the silicon and in the reference manual), please fix it where appropriate.

[benedek_kupper]

I'm attaching a quickly generated project:

1. Create a new project (Hello world) for iMXRT1011EVK in MCUXpresso IDE
2. Open MCUXpresso Config Tools/Clocks, change UART_CLK_SEL clock mux to PERCLK main clock output
3. Open MCUXpresso Config Tools/Peripherals, add the DebugConsole utility to BOARD_InitPeripherals, configure it to serial port/UART mode
4. Add SDK_DEBUGCONSOLE_UART 1 to C symbols, so the project can build
5. Run the example on the board

The result is: the UART console isn't functional, no "Hello world" is printed, the PRINTF call hangs.

[victorjimenez]

Hello @benedek_kupper, 

I will make some tests on my end to see if I'm able to replicate the behavior that you mentioned. I will let you know my results as soon as possible. 

Regards,
Victor 

[victorjimenez]

Hello, 

I was able to replicate the behavior that you mentioned, I'm checking this internally. I will provide you an update as soon as possible. 

Regards,
Victor 

[victorjimenez · Accepted solution]

Hello, 

The clock tree in the reference manual is wrong since the perclk is an option for the UART in the RT1010, this will be fixed in future releases of the reference manual. 

The SDK example doesn't work when you select this as the clock source because there is a clock gate between the clock root and peripheral, if you enable this gate, you will find the UART can work well.  To activate this gate please call the following function in your main before you configure the UART. 

CLOCK_EnableClock(kCLOCK_Pit);

Also, there's a problem with the function BOARD_DebugConsoleSrcFreq of the SDK, this function doesn't support the perclk option. This will be fixed in future releases of the SDK as well. In the meanwhile you can change this function manually, it should look like the following: 

Regards,
Victor 

[benedek_kupper]

Hi Victor,

Thanks for following this though, can I expect this clock gate call to show up in future releases of the SDK and ConfigTools as well?

[mjbcswitzerland]

Hello Victor

Many thanks!

With the "pit_clk_enable" gated I also confirm that the LPUARTs do indeed work correctly from the PERCLK_CLK_ROOT source.

Regards

Mark

[mjbcswitzerland]

Hi

I can confirm the same findings using the configuration that I prepared for the uTasker project.

Your printf() is probably using a blocking method if it hangs since the LPUART just does nothing and doesn't cause a failure in accessing it, etc.

Therefore PLL3_SW/6 is fine and OSC_CLK is fine but when trying to use PER_CLK the LPUARTs don't respond.

What I can say is that if the clock path is set back from the PER_CLK setting to one of the two that operate the LPUART starts working again - with the PER_CLK source setting my interrupt driven LPUART driver doesn't get any interrupts and so has data in its SW queue waiting to be transmitted. As soon as the clock is changed the interrupts start arriving and the data then goes out.

Therefore this new switch setting looks to be a red-herring that the config tools developers also used without testing it.It looks more like the register description is wrong but the clock diagram in right. The question is where did this new register description come from? Was it a mistake or was it actually envisaged that the i.MX RT 1011 would have this additional option at some point but it was forgotten, or it has a silicon errata?

The mystery continues !!!

In any case, as you presumably have done, using OSC_CLK allows PLL3 to be disabled if not used by any other parts of the system.

Regards

Mark

[mjbcswitzerland]

Hi

Attached is a binary that shows the situation on the iMX RT 1010 EVK. Here is how it can be used:

1. Load using MCU Boot Utility or whatever binary loader is available
2. It tries to send a welcome message to the LPUART (115 kBaud) but nothing comes out
3. The board enumerates as USB-CDC on the processor's HS-USB and when connected to a terminal emulator a command line menu is available. Hit 'Enter' to see it and then '3' to enter the I/O menu
4. Check the CCM_CSCDR1 register value with
""md 400fc024 l 1" which will show that the switch is set as wanted (0x00000080 bit set)
5. Change the value back to PLL3/6 with

"mm 400fc024 l 06000006"
or to OSC_CLK with
"mm 400fc024 l 06000046"

At this point the queued welcome message is sent out over the LPUART (although not with the correct baud rate due to the different baud clock speed.

Regards

Mark

USB-CDC terminal session reference:

Serial number: 00
Software version V1.4.014
Device identification: uTasker Number 1

     Main menu
===================
1              Configure LAN interface
2              Configure serial interface
3              Go to I/O menu
4              Go to administration menu
5              Go to overview/statistics menu
6              Go to USB menu
7              Go to I2C menu
8              Go to utFAT disk interface
9              FTP/TELNET commands
a              CAN commands
help           Display menu specific help
quit           Leave command mode
3


 Input/Output menu
===================
up             go to main menu
md             Memory Display [address] [<l>|<w>|<b>] [num]
mm             Memory Modify [address] [<l>|<w>|<b>] [val]
mf             Memory Fill [address] [<l>|<w>|<b>] [val] [num]
sd             Storage Display {as md}
sm             Storage Modify {as mm}
sf             Storage Fill {as mf}
se             Storage Erase [address] [len-hex]
sr             Status read
sw             Status write
set_ddr        Set port type [1..4] [<i>|<o>
get_ddr        Get data direction [1..4]
read_port      Read port input [1..4]
write_port     Set port output [1..4] [0/1]
out            output value [hex]
save           Save port setting as default
help           Display menu specific help
quit           Leave command mode

#md 400fc024 l 1
Memory Display
0x400fc024     06000086  ....

#mm 400fc024 l 06000006
Write - OK

#

[victorjimenez]

Hello, 

The UART in the RT1011 does have three different clock source options, you can see this in the register CCM_CSCDR1 under the UART_CLK_SEL field. There is a problem with Figure 14-3 of the reference manual because in this clock tree we don't mention the per_clk_root, I already reported this to the documentation team so they can fix it in future releases. 

Regards, 
Victor 

[mjbcswitzerland]

Hi

Thanks for that useful information, which I didn't know before.

I just updated the uTasker user's guide https://www.utasker.com/docs/iMX/i.MX_RT_1011_uTasker.pdf and driver in order to use this setup too.

Regards

Mark

[mjbcswitzerland]

Hi

Such an error will not be restricted to the 1011 since the LPUART clock is the same in all i.MX RT 10XX parts.

From the uTasker developer's practical  guide: https://www.utasker.com/docs/iMX/i.MX_RT_1021_uTasker.pdf (1011 guide points to this one for the UART clock since it is globally the same) these are the two possibilities:

The guides are available for a complete list of all clocking possibilities to more easily visualise the capabilities and restrictions.

As noted, there is in fact a third configuration of 4MHz when PLL3 disabled (but bypassed) but it is not a very interesting method.
Maybe the config tool is trying to do this but forgets to bypass the PLL? Or you have manually changed the bypass setting in the process of disabling the PLL?

Regards

Mark