iMX RT-1064 CAN3 - CAN FD bit timing

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iMX RT-1064 CAN3 - CAN FD bit timing

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steffenrose
Contributor III

Is it right, that FPROPSEG is the only one value, that is not reduced by 1?

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @steffenrose ,

  You are always welcome!

   Yes, if the setting already in the range, your FPROGSEG even doesn't need to do a decrement.

 

Wish it helps you!

If you still have questions about this case, just kindly let me know.

If your question is solved, please help to mark the correct answer, just to close this case, thanks.

Best Regards,

Kerry

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @steffenrose ,

  To the FPROPSEG settings, it just need to follow this timing:

kerryzhou_0-1686552208715.png

Make sure FPROPSEG+FPSEG1+1 in the range of 2 to 39.

And also need to follow this table:

kerryzhou_1-1686552346267.png

After the above is matched, you can select any data for the FPROPSEG.

 

Wish it helps you!

Best Regards,

Kerry

 

 

 

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steffenrose
Contributor III

Thank you. I understand your answer, that FPROGSEG is the only one register part, that I don't have to decrement as all other parameter of the bittiming setting.

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @steffenrose ,

  You are always welcome!

   Yes, if the setting already in the range, your FPROGSEG even doesn't need to do a decrement.

 

Wish it helps you!

If you still have questions about this case, just kindly let me know.

If your question is solved, please help to mark the correct answer, just to close this case, thanks.

Best Regards,

Kerry

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steffenrose
Contributor III

@kerryzhouThank you very much.

 

My question about the specific parameter is solved. But your hints are unsure. The second table is for classic CAN and not for CAN FD. So I'm unsure, how I should use it for my definition in the CBT and FDCBT register. (CBT is the same as CTRL1, but with a different range.)

 

The CiA1301 standard specify bigger values. But I think your hint is, that the values should not be to small. That fits.

 

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @steffenrose ,

  To the CANFD, you can use the SDK API to improve the time value:

if (FLEXCAN_FDCalculateImprovedTimingValues(EXAMPLE_CAN, flexcanConfig.bitRate, flexcanConfig.bitRateFD,
EXAMPLE_CAN_CLK_FREQ, &timing_config))

 

Best Regards,

Kerry

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steffenrose
Contributor III

@kerryzhouThank you very much for your suggestions.

 

But please note, on CAN FD it is very importend, that all nodes use the same settings. So I have to use the specified values and not calculated values.

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @steffenrose ,

  Previously, when I calculated the CANFD timing manually, I also used the second table as a limit to get the related time value, the communication didn't meet issues. 

   You also can refer to the RM chapter 45.3.9.7 Protocol timing, 

  At least, meet this bit time:

kerryzhou_0-1686646943629.png

 

Wish it helps you!

Best Regards,

Kerry

 

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steffenrose
Contributor III

@kerryzhouThank you very much. It was very helpful.

 

Possible you have also an answer to my other question - alternative MB use in difference to RX Fifo and from your colleguage - minimum clock?

https://community.nxp.com/t5/i-MX-RT/iMX-RT-1064-receive-CAN-FD-Frames-on-CAN3/m-p/1663441/highlight...

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @steffenrose ,

    You can create a new question post and @kerry zhou, then tell me what the bit clock you want to realize,  I will find time to help you to generate one, thanks.

In your new post, also tell me your used RT board, and IDE.

Best Regards,

Kerry

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