iMX 1064 RT, GPIO, and SDK

[Keith4DSmith]

The iMX 1064 RT has several GPIO peripherals, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO6, GPIO7, GPIO8, GPIO9.

In the function GPIO_PinInit(), there is a test to see if the GPIO index is in the range of 1 to 5.

kCLOCK_Gpio1, kCLOCK_Gpio2, kCLOCK_Gpio3, kCLOCK_Gpio4, kCLOCK_Gpio5

It appears that GPIO1-5 require a clock to be enabled for each GPIO, but GPIO6-9 do not.

Which clock is used with GPIO6-9 and when is this clock expected to be enabled?

In reading the Clock Control Module (chapter 13 of reference manual), the ahb_clk_root is the clock root for GPIO6-9.

I have found clock_config.c configures the ahb clock.

Are there any other differences between GPIO1-5 and GPIO6-9 that a developer should be aware of?

[mjbcswitzerland]

Keith

GPIOs tend to be clocked from IPG_CLK_ROOT (usually slower than AHB_CLK_ROOT, which is the Cortex Core clock) and each port has a clock gate that can be used to enabled/disable the clock on a port basis.

GPIO6-9 in the 1064 are however directly connected to the core clock and have no clock gate (always on when the core clock is on) meaning that no gating needs to be controlled.

Otherwise there is no programming differences.

See the following for GPIO overview:

https://www.youtube.com/watch?v=SmFTi8hlba0&list=PLWKlVb_MqDQFZAulrUywU30v869JBYi9Q&index=29

See pages 7..13 of https://www.utasker.com/docs/iMX/i.MX_RT_1021_uTasker.pdf for some details of core and IPG clock root

Regards

Mark
[uTasker project developer for Kinetis and i.MX RT]