i.MXRT DMA speed.

[patricio]

Hi,

I need to select an MCU that is able to work at a very high frequency. The MCU will receive information from a 12 or 14-bit ADC, at 200 Msps, in parallel to a GPIO port. I will need to write each of these samples to memory via DMA. As you can see, there is no data processing involved, just storage at a fairly high speed. So, I need to find an MCU that can perform this task quickly. I see that the i.MX RT microcontrollers offer solutions with operation frequencies of 500MHz, 600MHz, 800MHz, and up to 1000MHz (core frequencies). However, I can't find clear information about the speed at which the DMA would operate. I have downloaded the datasheet and reference manuals of i.MXRT1024 and i.MXRT1170, but I am unable to find this information.

Any help will be appreciated. Thanks in advance. 

Any help will be appreciated. Thank in advance.

[jh0]

This diagram from APF-SMC-T3273 (i.MX RT Overview and Security on Memory Expansion Design) is related to i.MX RT1050.

 

From my point of view if DMA want data form GPIO it is located on AIPS-2 @ 150MHz, and than store it on OCRAM @ 150MHz.

CPU (with HS GPIO and TCM RAM) can do it in one (or two) CPU cycle(s).

[patricio]

Hi Jho,

Coming back to this matter, as you said, this diagram is related with imxrt1050. I searched in its reference manual and I found the following clock roots for DMA and GPIO. Both use IPG_CLK_ROOT with a maximum frequency of 150MHz. It matches with what you said. 

 

I'm not able to find a similar diagram for imxrt1170. So, what I'm trying to say with all this is that if the information in the iMXRT1050 tables matches with the diagram, I believe that my reflections about DMA and GPIO frequency in iMXRT1170 could be correct.

However, I will explore also the way of HS GPIO and TCM RAM, as it is very interesting. There is not much information about it, but I will look into it. 

Thank you. 

[patricio]

Thank you for your comments and contribution, indeed. 

[jh0]

DMA is connected to system over SIM_M7 64bit @ 150 MHz.

[patricio]

Very appreciated Jho for your contribution.

The truth is that your answer has been a clue to understand the Clock Management section. From what I have seen, your response referred to the i.MXRT1024 MCU, right? I have carefully reviewed the reference manual for the i.MXRT1170, and I think that DMA could operate at a frequency of 240MHz or even 400MHz, both in overdrive mode. Table 15.2 attached shows the Clock roots that could access the DMA, and Table 15.4 attached indicates the maximum frequency at which it could operate. 

• I understand that at these speeds, I shouldn't have any problem moving data coming into the GPIO port at 200Msps to memory via DMA. Am I right in my conclusion?
• What does 'work in over-drive' mean? Could it be a problem?

Thank you in advance. 

[jh0]

Don't know about 'work in over-drive' . DMA must take data for GPIO at max access time and store it in RAM at max access time. From my point of view (by bus working frequency on IMXRT diagrams) this can't be so fast. But I don't know internals.

However, some IMXRT devices are with HS GPIO that is in C7 domain, and read/write can be executed in one CPU cycle. Same as TCM RAM. If CPU precisely know when ADC is sending data, with aligned code, CPU can copy data from HS GPIO to RAM very fast (without doing anything else).  

[patricio]

In the same table 15.2 shows that GPIO 1 to 6 can be sourced by BUS_CLK_ROOT, which can run at 240MHz máximum. 

When you say 'by bus working frequency on iMXRT diagrams', could you please show me which diagram and frequency values are you talking about?

Thank you again.