i.MXRT ADC ETC Sample Rate

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i.MXRT ADC ETC Sample Rate

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adam_smith
Contributor II

Hello,

I have an i.MXRT1160 EVK and I want to perform some ADC measurements.

I reviewed the adc_etc_hardware_trigger_conv_cm7 example and found something strange related to the ADC power and performance mode.

I have checked two configurations to speed up the sample rate.

one of them is this

LPADC_GetDefaultConfig(&lpadcConfig);
lpadcConfig.enableAnalogPreliminary = true;
lpadcConfig.powerLevelMode = kLPADC_PowerLevelAlt1;
LPADC_Init(DEMO_ADC_BASE, &lpadcConfig);

and the other is

LPADC_GetDefaultConfig(&lpadcConfig);
lpadcConfig.enableAnalogPreliminary = true;
lpadcConfig.powerLevelMode = kLPADC_PowerLevelAlt4;
LPADC_Init(DEMO_ADC_BASE, &lpadcConfig);

With those settings, and according to the reference manual, the second setup should run faster than the previous one, since it was set to the highest power setting.

However, I have carried out some profile measurements and the first configuration is faster than the second. Isn't it supposed to be the other way around? Why is the second configuration slower?

Thank you

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_Leo_
NXP TechSupport
NXP TechSupport

Hi,

Thank you so much for your interest in our products and for using our community.

In levels 3 and 4, the LPADC will delay start of sampling for 16 ADC clock cycles on the initial conversion. This delay is in addition to any configured Power Up delay or trigger delay.

I suggest you make your measurements with samples after the initial one. For more detail please refer to the 86.3.3 Power control section of reference manual.

Hope it helps you.

Have a nice day!

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