i.MX RT1062 boot configuration with eFuses

Rino · ‎05-31-2021

Hello,

I'm trying to get working a custom board with a MIMXRT1062CVJ5A which has a QSPI Flash (W25Q64JV) on the 1nd pinmux option (BOOT_CFG[3:1] = 000, 3B read by default).

The board has no pins for the cfg configuration (pins occupied by the LED matrix), the bmod is led out and I can change it. I tested for configuration 00, 01, 10. Regardless of configuration, serial downloader works every time and I can connect to MCU Boot Utility.
Can I mix bmod settings with efuse (bt_fuse_sel = 1)? Following the documentation, if bt_fuse_sel is set in any mode (00, 01, 10) the configuration is taken from eFuses?

The second strange thing is the lack of flash recognition in MCU Boot Utility, selected W25QxxJV in settings. It looks like (Devboard with RT1052B shows correctly the original memory that is there):

--------MCU device Register----------
OCOTP->UUID[31:00] = 0x677f0555
OCOTP->UUID[63:32] = 0x112061d2
SRC->SBMR1 = 0x0
SRC->SBMR2 = 0x2000019
BMOD[1:0] = 2'b10 (Internal Boot)
HAB status = Open
--------MCU Flashloader info-------
Current Version = K2.1.0
Target Version = T1.0.0
--------MCU device eFusemap--------
(0x450) BOOT_CFG0 = 0x0
(0x460) BOOT_CFG1 = 0x18
(0x470) BOOT_CFG2 = 0x0
BT_FUSE_SEL = 1'b1
----------FlexRAM memory-----------
IOMUXC_GPR->GPR16 = 0x200003
FlexRAM configuration is from eFuse
OCOTP->MISC_CONF0[31:00] = 0x40
FlexRAM Partion =0000 - 128KB ITCM, 128KB DTCM, 256KB OCRAM
--------FlexSPI NOR memory--------
Page Size = --------
Sector Size = --------
Block Size = --------

From the MCU Boot Utility level, I can dump the memory but I cannot clean it - error 20016 (cleaning from MCUXpresso works). Debug in MCUXpresso doesn't work (Jlink and swd mode).

Doing a memory dump, I noticed that at the address 0x60000000 I probably have garbage and not the correct configuration. The same in the place of the IVT table (0x60001000), there should be at the beginning d1 00 20 41 00 20 00 ? Screenshots below.

It occurred to me that I might have a misconfigured project, but an identically created project for EVK-1052 works without any problems. I also checked the demo_app hello world for 106x (I only changed package of mcu in the settings and turned off dcd) and the effect is the same as in the screenshots above.

I have the SDK in the latest version. Any tips what am I doing wrong :)?

jeremyzhou · ‎05-31-2021

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
1）Can I mix bmod settings with efuse (bt_fuse_sel = 1)?
-- Yes, and in my opinion, it seems like you need to use the eFuse to replace the BOOT_CFG1 pins to set the boot device, as the board has no pins for the cfg configuration.

2) The same in the place of the IVT table (0x60001000), there should be at the beginning d1 00 20 41 00 20 00 ?
-- Yes, I was wondering if you can share the flexspi_nor_config_t struct and it can provide an insight into the strange phenomenon.
Have a great day,
TIC

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Rino · ‎05-31-2021

Thanks for the answer.

I must something besides bt_fuse_sel be set (assuming eFuse's default configuration is sufficient)?

I created flexspi_nor_config_t struct based on example in AN12183 note.

const flexspi_nor_config_t qspiflash_config =

{
.memConfig =
{
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClksrc=kFlexSPIReadSampleClk_LoopbackFromSckPad,
.csHoldTime = 3u,
.csSetupTime = 3u,
.sflashPadType = kSerialFlash_4Pads,
.serialClkFreq = kFlexSpiSerialClk_30MHz,
.sflashA1Size = 8u * 1024u * 1024u,
.lookupTable =
{
// Read LUTs
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x04, READ_SDR, FLEXSPI_4PAD, 0x04),
},
},
.pageSize = 256u,
.sectorSize = 4u * 1024u,
.blockSize = 64u * 1024u,
.isUniformBlockSize = false,
};

I set readSampleClkSrc to kFlexSPIReadSampleClk_LoopbackFromSckPad because the Dqs pin is not connected (I checked different configurations for readSampleClkSrc).

Have a nice day.

jeremyzhou · ‎05-31-2021

Hi,
Thanks for your reply.
1) I must something besides bt_fuse_sel be set (assuming eFuse's default configuration is sufficient)?
-- Yes.
2) Please use the below flexspi_nor_config_t struct to replace the original one.

const flexspi_nor_config_t qspiflash_config = {
    .memConfig =
        {
            .tag              = FLEXSPI_CFG_BLK_TAG,
            .version          = FLEXSPI_CFG_BLK_VERSION,
            .readSampleClksrc=kFlexSPIReadSampleClk_LoopbackFromDqsPad,
            .csHoldTime       = 3u,
            .csSetupTime      = 3u,
            .sflashPadType    = kSerialFlash_4Pads,
            .serialClkFreq    = kFlexSpiSerialClk_100MHz,
            .sflashA1Size     = 8u * 1024u * 1024u,
            .lookupTable =
                {
                    // Read LUTs
                    FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
                    FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
                },
        },
    .pageSize           = 256u,
    .sectorSize         = 4u * 1024u,
    .blockSize          = 64u * 1024u,
    .isUniformBlockSize = false,
};

Have a great day,
TIC

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DiBosco · ‎01-24-2023

Hi,

Where is the documentation for things like these structures (such as qspiflash_config) and all the enums, #defines etc such as

FLEXSPI_CFG_BLK_VERSION

FLEXSPI_1PAD

and macros such as

FLEXSPI_LUT_SEQ

And generally how to use this software. There are bits of code, bizarrely, in the processor's user manual such as flexspi_nand_config_t and how it is set up for a Winbond chip, but frustratingly no description whatsoever of what the plethora of options within it are.

If you click on a function to see if it might tell what it does, the IDE won't take you there, I assume it is a binary blob for which you have no access to.

A Google search brings up nothing other than the odd bit of source code which is diabolically poorly commented.

Thanks

PS I know I'm replying to someone else's thead, but no-one has rpelied to help from mine. I'm hoping someone might see this and be able to help.

Rino · ‎06-01-2021

Hi,
thanks for your reply.

I modified the structure as you mentioned above, still the same symptoms.

Have a nice day.

jeremyzhou · ‎06-01-2021

Hi,
Thanks for your reply. According to your previous description, the board has no pins for the cfg configuration, which means that you need to use the Fuse instead of the BOOT_CFG1 pins.
So I'd like to suggest you check the eFuse setting is right or not firstly,
next, you can refer to the post to generate a bootable image then program it to QSPI.
Have a great day,
TIC

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Thank you!

i.MX RT1062 boot configuration with eFuses

i.MX RT1062 boot configuration with eFuses

i.MXRT 106x