Hi,
I'm currently designing a system based on an NXP RT1062 MCU and an ADSP, connected via I²S/TDM to an external audio codec.
I have a few questions regarding the optimal audio clock architecture to ensure best sound quality (lowest jitter, highest stability):
MCLK generation:
BCLK and LRCLK generation:
In best practice, should the codec be configured as the BCLK/LRCLK master, outputting clock signals to the DSP and MCU?
Or is it acceptable for the MCU or DSP to act as master, generating BCLK/LRCLK for the codec?
Practical examples:
In professional or industrial designs, what is the common recommendation?
Are there any notable product examples that use MCU-generated MCLK successfully without compromising audio quality?
My priority is to minimize jitter and achieve reliable audio performance while keeping hardware design relatively simple.
Any advice, recommendations, or official guidelines would be highly appreciated!
Thanks a lot!
Hello @5angxr,
The recommendation is to use an external crystal for greater precision, but the specifications depend on your application's design. For PLL electrical characteristics, refer to chapter 4.2.3, "PLL’s Electrical Characteristics," in the datasheet. For XTAL considerations, see chapter 3.1, "Special Signal Considerations," in the datasheet.
With this in mind, you can use this external signal to provide the MCU clock and simultaneously use the MCU as a master to provide the MCLK for the DSP and codec.
For more information, refer to the Hardware Development Guide for the MIMXRT1050/MIMXRT1060 Processor or the design of the RT1060-EVKC. Additionally, the SDK (version 25.03) offers examples where the MCLK is generated in the MCU and provided to the codec:
I hope that helps.
BR
Habib