Unable to communicate with SRAM when application running in the SDRAM

[Jeevan]

Hello Team,

We have loaded our bare metal application code in the SDRAM and executing from SDRAM. While executing this application we are trying to communicate with the external FPGA through SRAM

Kindly help us out for the below mentioned Query

Methodology: Bare metal application code is running from SDRAM directly using DCD configuration. The bare metal application code needs to talk with the FPGA via SRAM, so during this operation we are trying to debug and verify the communication of FPGA from SDRAM, But as both the FPGA and SDRAM shares same SEMC data + address line its not possible to do it.

As I have tried to move the SRAM initialization and access of other information of FPGA via SRAM by modifying the linker file there also, I am not able to move completely to FLASH or SRAM.

Inference: We are unable to establish communication with FPGA connected as SRAM to our custom IMXRT1170 board when the application is executing in the SDRAM

Query: Is there any other way to communicate to the FPGA via SRAM from SDRAM ? or Am I missing something here while communicating to the SRAM ?

[Sam_Gao]

Hi @Jeevan 

It seems SEMC of I.MX RT connected to SDRAM and SRAM in same SEMC data/address line. In fact, SEMC can support up to 5 kinds of device with sharing the same data/addr pad.

please double check from both hardware and software side with our reference manual.

Here I can't find more details based on your message, such as hardware connection, which chip, sw configuration/sdk version, reproduced steps, it's hard for us to provide more specific support.

[Jeevan]

Hello @Sam_Gao  ,

We are using below MCUxpresso and configurations...

1. MCUxpresso IDE (MCUXpresso IDE v11.8.1 [Build 1197] [2023-10-27])

2. SDK (2.14.0)

3. MCU part number (IMXRT1176xxxxx)

Actually i was trying to run the SRAM related files in SRAM instead of running in SDRAM for below changes in linker file marked in red box below.

change 1:

change 2:

Similarly please help me run SRAM related files in FLASH instead of SRAM in linker file as shown above.

[Sam_Gao]

Apologize for the delay.

It seems you want to run some code which was related to SRAM in Flash, I am not sure if below comments help you.

// data.ldt for reference.

MEMORY
{
    SRAM_ITC (rwx) : ORIGIN = 0x20200000, LENGTH = 0x40000
}

SECTIONS
{
    .text.sram_init :
    {
        *spi.o(.text)
        *semc_sram.o(.text)
        *fsl_semc.o(.text)
    } > FLASH

    .rodata.sram_init :
    {
        *spi.o(.rodata)
        *semc_sram.o(.rodata)
        *fsl_semc.o(.rodata)
    } > FLASH
}

// main_text.ldt for reference.

MEMORY
{
    FLASH (rx) : ORIGIN = 0x60000000, LENGTH = 0x800000 /* Adjust as per your flash size */
    SRAM_OC (rwx) : ORIGIN = 0x20000000, LENGTH = 0x20000
    SRAM_ITC (rwx) : ORIGIN = 0x20200000, LENGTH = 0x40000
    SDRAM (rwx) : ORIGIN = 0x80000000, LENGTH = 0x800000 /* Adjust as per your SDRAM size */
}

SECTIONS
{
    .text :
    {
        *(EXCLUDE_FILE(*spi.o *semc_sram.o *fsl_semc.o) .text)
    } > FLASH

    .text.sram_init :
    {
        *spi.o(.text)
        *semc_sram.o(.text)
        *fsl_semc.o(.text)
    } > FLASH

    .rodata :
    {
        *(EXCLUDE_FILE(*spi.o *semc_sram.o *fsl_semc.o) .rodata)
    } > FLASH

    .rodata.sram_init :
    {
        *spi.o(.rodata)
        *semc_sram.o(.rodata)
        *fsl_semc.o(.rodata)
    } > FLASH

    .bss :
    {
        *(.bss)
    } > SRAM_OC

    .data :
    {
        *(.data)
    } > SRAM_OC AT>FLASH

    .data_RAM4 :
    {
        *(.data_RAM4)
    } > SDRAM
}