USB Host MSD FATFS driver performance when cache is enabled

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USB Host MSD FATFS driver performance when cache is enabled

1,144件の閲覧回数
RichardY
Contributor II

Hi,

I am using RT1170 processor. We got some performance issue with USB Host MSD FAT file system when placing the data on SDRAM or OCSRAM. I am trying to use an SDK example to demonstrate the issue. I am not sure if anyone experienced this issue?

Setup 1, Original RT1170 SDK example

  1. Import SDK example host_msd_fatfst_freertos_cm7.
  2. Change  MCU_CORE_CLOCK from 120000000 to 998000000 to reflect the correct CPU core clock frequency.
  3. Change MSD_FATFS_THROUGHPUT_TEST_ENABLE from 0 to 1 so the code will measure USB MSD read and write speed.
  4. Build the project. The code is XIP from the NOR flash. BSS segment, stack and heap are put on the DTC.
    RichardY_0-1730145925244.png
  5. Debug the project on RT1170 EVK. I also need to connect a USB flash drive to micro USB1 (J20) on RT1170 EVK.
  6. The following results are printed on debug console. The read speed is around 25MB/s.
    RichardY_1-1730147550992.png

Setup 2, Original example + BSS segment, stack and heap in OCSRAM (set to non-cacheable)

  1. Same as Setup 1 step 1.
  2. Same as Setup 1 step 2
  3. Same as Setup 1 step 3.
  4. Move SRAM_OC1 to first RAM option in the table of MCU setting.
    RichardY_5-1730147804293.png
  5. Disable the cache on OCRAM by changing the value in board.c file from 1 to 0 as highlighted in the following 

    RichardY_3-1730147691700.png
  6. Build the project. The code is XIP from the NOR flash. BSS segment, stack and heap are put on the OCSRAM.
    RichardY_4-1730147720201.png
  7. Debug the project on RT1170 EVK. I also need to connect a USB flash drive to micro USB1 (J20) on RT1170 EVK.
  8. The following results are printed on debug console. The read speed is around 22MB/s.

Setup 3, Original example + DATA_SECTION_IS_CACHEABLE=1 + default ram is OCSRAM (set to cacheable)

  1. Same as Setup 2 step 1.
  2. Same as Setup 2 step 2.
  3. Same as Setup 2 step 3.
  4. Same as Setup 2 step 4.
  5. Set DATA_SECTION_IS_CACHEABLE=1 in preprocessor.
    RichardY_6-1730147837890.png
  6. Build the project. The code is XIP from the NOR flash. USB related data is in DTC. Other BSS segment, stack and heap are put on the OCSRAM.
    RichardY_7-1730147876822.png
  7. Debug the project on RT1170 EVK. I also need to connect a USB flash drive to micro USB1 (J20) on RT1170 EVK.
  8. The following results are printed on debug console. The read speed is less than 0.5MB/s. I do not think this speed is normal with cache enabled. What have I got wrong?
    RichardY_8-1730147919682.png

Thanks and regards,

Richard

 

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1,137件の閲覧回数
EdwinHz
NXP TechSupport
NXP TechSupport

Hi @RichardY,

I believe you describe the issue that is seen on the following knowledge base article: Using NonCached Memory on i.MXRT - NXP Community

Please use non-cacheable TCM as the article suggests in order to have the best possible performance on USB middleware.

BR,
Edwin.

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RichardY
Contributor II

Hi EdwinHz,

Yes, I did following the example. When DATA_SECTION_IS_CACHEABLE=1 is set, DMA buffer and other USB data objects are put into the DTC. However, the speed is also significantly slower after setting DATA_SECTION_IS_CACHEABLE=1. I can see when DATA_SECTION_IS_CACHEABLE=1 is set it also enables extra code, not sure if those extra code are significantly slowing down the USB driver.

Thanks and regards,

Richard