Timer vs Timer Input (via XBAR)?

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Timer vs Timer Input (via XBAR)?

180 Views
dcc_1234
Contributor I

I'm trying to read tachometer outputs from a computer fan using an NXP RT1020-series chip but am confused with the difference between IOMUX timer accessible via GPIO pins (i.e. TMR1_TIMER0 via GPIO_SD_B0_00) versus timer input via XBAR (i.e. TMR1_TIMER0 at GPIO_AD_B1_09 via XBAR). Is there a difference between the two methods and when would one chose one option over the other?

0 Kudos
Reply
1 Reply

136 Views
Bio_TICFSL
NXP TechSupport
NXP TechSupport

Hello,

I'll address the difference between IOMUX timer accessible via GPIO pins versus timer input via XBAR on the RT1020-series chip.

The difference between TMR1_TIMER0 via GPIO_SD_B0_00 and TMR1_TIMER0 at GPIO_AD_B1_09 via XBAR involves two different routing methods for timer signals:

1. Direct Timer Connection (IOMUX):
When using TMR1_TIMER0 via GPIO_SD_B0_00, you're accessing the timer directly through the IOMUX (Input/Output Multiplexer). This represents the default/direct path where the timer functionality is hardwired to specific GPIO pins. You simply configure the pin mux setting to select the timer function (typically ALT mode 1, 2, etc.).

2. XBAR Routing Method:
When using TMR1_TIMER0 at GPIO_AD_B1_09 via XBAR, you're utilizing the Cross Bar (XBAR) peripheral to route the timer signal to a different pin. This provides flexibility when the default timer pins are occupied by other critical functions (like SEMC, ENET, or SD card interfaces).

You would choose XBAR routing when:
- The default timer pins are already used by other essential peripherals
- You need to route multiple signals to a single peripheral
- You need to connect a pin to both GPIO functionality and timer input simultaneously
- You need flexible input/output signal routing without hardware modifications

The direct IOMUX method is simpler to implement but less flexible in pin selection. The XBAR method requires additional configuration but offers greater flexibility when default pins are unavailable.

For your fan tachometer application, the XBAR approach would be beneficial if the default TMR1_TIMER0 pins conflict with other peripherals you're using. Implementation requires enabling XBAR clock, configuring pins for XBAR function, and properly setting XBAR routing registers to map inputs to outputs.

Regards

0 Kudos
Reply
%3CLINGO-SUB%20id%3D%22lingo-sub-2254332%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3ETimer%20vs%20Timer%20Input%20(via%20XBAR)%3F%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2254332%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EI'm%20trying%20to%20read%20tachometer%20outputs%20from%20a%20computer%20fan%20using%20an%20NXP%20RT1020-series%20chip%20but%20am%20confused%20with%20the%20difference%20between%20IOMUX%20timer%20accessible%20via%20GPIO%20pins%20(i.e.%20TMR1_TIMER0%20via%20GPIO_SD_B0_00)%20versus%20timer%20input%20via%20XBAR%20(i.e.%20TMR1_TIMER0%20at%20GPIO_AD_B1_09%20via%20XBAR).%20Is%20there%20a%20difference%20between%20the%20two%20methods%20and%20when%20would%20one%20chose%20one%20option%20over%20the%20other%3F%3C%2FP%3E%3C%2FLINGO-BODY%3E%3CLINGO-SUB%20id%3D%22lingo-sub-2255336%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%20translate%3D%22no%22%3ERe%3A%20Timer%20vs%20Timer%20Input%20(via%20XBAR)%3F%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2255336%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EHello%2C%3C%2FP%3E%0A%3CP%3E%3CSPAN%3EI'll%20address%20the%20difference%20between%20IOMUX%20timer%20accessible%20via%20GPIO%20pins%20versus%20timer%20input%20via%20XBAR%20on%20the%20RT1020-series%20chip.%3CBR%20%2F%3E%3CBR%20%2F%3EThe%20difference%20between%20TMR1_TIMER0%20via%20GPIO_SD_B0_00%20and%20TMR1_TIMER0%20at%20GPIO_AD_B1_09%20via%20XBAR%20involves%20two%20different%20routing%20methods%20for%20timer%20signals%3A%3CBR%20%2F%3E%3CBR%20%2F%3E1.%20Direct%20Timer%20Connection%20(IOMUX)%3A%3CBR%20%2F%3EWhen%20using%20TMR1_TIMER0%20via%20GPIO_SD_B0_00%2C%20you're%20accessing%20the%20timer%20directly%20through%20the%20IOMUX%20(Input%2FOutput%20Multiplexer).%20This%20represents%20the%20default%2Fdirect%20path%20where%20the%20timer%20functionality%20is%20hardwired%20to%20specific%20GPIO%20pins.%20You%20simply%20configure%20the%20pin%20mux%20setting%20to%20select%20the%20timer%20function%20(typically%20ALT%20mode%201%2C%202%2C%20etc.).%3CBR%20%2F%3E%3CBR%20%2F%3E2.%20XBAR%20Routing%20Method%3A%3CBR%20%2F%3EWhen%20using%20TMR1_TIMER0%20at%20GPIO_AD_B1_09%20via%20XBAR%2C%20you're%20utilizing%20the%20Cross%20Bar%20(XBAR)%20peripheral%20to%20route%20the%20timer%20signal%20to%20a%20different%20pin.%20This%20provides%20flexibility%20when%20the%20default%20timer%20pins%20are%20occupied%20by%20other%20critical%20functions%20(like%20SEMC%2C%20ENET%2C%20or%20SD%20card%20interfaces).%3CBR%20%2F%3E%3CBR%20%2F%3EYou%20would%20choose%20XBAR%20routing%20when%3A%3CBR%20%2F%3E-%20The%20default%20timer%20pins%20are%20already%20used%20by%20other%20essential%20peripherals%3CBR%20%2F%3E-%20You%20need%20to%20route%20multiple%20signals%20to%20a%20single%20peripheral%3CBR%20%2F%3E-%20You%20need%20to%20connect%20a%20pin%20to%20both%20GPIO%20functionality%20and%20timer%20input%20simultaneously%3CBR%20%2F%3E-%20You%20need%20flexible%20input%2Foutput%20signal%20routing%20without%20hardware%20modifications%3CBR%20%2F%3E%3CBR%20%2F%3EThe%20direct%20IOMUX%20method%20is%20simpler%20to%20implement%20but%20less%20flexible%20in%20pin%20selection.%20The%20XBAR%20method%20requires%20additional%20configuration%20but%20offers%20greater%20flexibility%20when%20default%20pins%20are%20unavailable.%3CBR%20%2F%3E%3CBR%20%2F%3EFor%20your%20fan%20tachometer%20application%2C%20the%20XBAR%20approach%20would%20be%20beneficial%20if%20the%20default%20TMR1_TIMER0%20pins%20conflict%20with%20other%20peripherals%20you're%20using.%20Implementation%20requires%20enabling%20XBAR%20clock%2C%20configuring%20pins%20for%20XBAR%20function%2C%20and%20properly%20setting%20XBAR%20routing%20registers%20to%20map%20inputs%20to%20outputs.%3C%2FSPAN%3E%3C%2FP%3E%0A%3CP%3E%3CSPAN%3ERegards%3C%2FSPAN%3E%3C%2FP%3E%3C%2FLINGO-BODY%3E