RT1176: Debugging custom FlexSPI Configuration Block

[raddeh]

We're developing a custom board with an i.MX RT1166 uC and another flash chip than used on the NXP eval board. Our flash chip uses different timings than the one of the NXP eval board, thus we need to write our own FlexSPI Configuration Block. We know that or board does work, as we can read/write to/from ext flash when loading a firmware directly into the internal RAM of the RT1176. Whith this RAM-only firmware we can upload a firmware with FlexSPI Configuration Block into the external flash.

The load from flash apparently doesn't yet work on our custom board. Thus the open question is, if there is a way for the ROM SW to give us debugging information about what failed? We'd like to know where the ROM SW failed to load the firmware, e.g. if it could at least read the FlexSPI Configuration Block or if the reconfiguration of the FlexSPI with the parameters from the FlexSPI Configuration Block is erroneous.

[jay_heng]

No, we cannot debug FlexSPI Configuration Block, as ROM code is not open to customer.

Which flash chip and FlexSPI connection in your board? i can give you a demo FlexSPI Configuration Block

[raddeh]

@jay_heng I'm using the RT1176AVM8A with the  AS1016204-0108X0PWA MRAM connected to FlexSPI1 Port A.

In my RAM-only test program, I'm able to read/write to the MRAM via IP command with the following settings:

isSck2Enabled = false
flashSize = 0x800
cs_interval = 500 ns
CSHoldTime = 5 ns
CSSetupTime =  6 ns
dataValidTime = 5 ns
columnspace = 0
enableWordAddress = false
enableWriteMask = false

/* Read Memory Array - SDR [CMD | ADDR | DUMMY | READ]*/ \
[0]  =  FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR,       kFLEXSPI_1PAD, 0x6B, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), 
[1]  =  FLEXSPI_LUT_SEQ(kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 8,    kFLEXSPI_Command_READ_SDR,  kFLEXSPI_4PAD, 0x04), 

/* Write Enable*/ 
[4]  =  FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x06,       kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0x00), 

/* Fast Write Memory Array - SDR [CMD | ADDR | DUMMY | WRITE | DUMMY]*/ 
[8]  =  FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR,       kFLEXSPI_1PAD, 0x32, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), 
[9]  =  FLEXSPI_LUT_SEQ(kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 8,    kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_4PAD, 0x04), 
[10] =  FLEXSPI_LUT_SEQ(kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 20,   kFLEXSPI_Command_STOP,      kFLEXSPI_4PAD, 0x00), 

FlexSPI Init parameters are default as returned by FLEXSPI_GetDefaultConfig().

[jingpan]

Hi @raddeh ,

Please use this config in the flexspi_nor_polling example. Can it read correctly by AHB bus access?

Regards,

Jing

[raddeh]

@jingpan No, sadly I haven't gotten access via AHB bus to work with it yet.

[jingpan · Accepted solution]

Hi @raddeh ,

We haven't such example or experience on such MRAM device before. But it seems FlexSPI should have the ability to access it. First of all, you should pass the flexspi_nor_polling_transfer example because bootloader read code and data via AHB access. Bootloader can't report what the problem. Using flexspi_nor_polling_transfer is the easiest way to debug.

Regards,

Jing

[raddeh]

OK, thanks for the help