RT1165 M4 core code execution speed from FlexSPI1

[stephenschwartz]

We have found SDRAM access from the M4 core to be very slow, which is confirmed by this post:

https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/How-to-move-CM4-core-project-to-SDRAM-in-RT1176/...

If we move code to NOR flash in FlexSPI1, will there be an improvement in speed?

Also, is it possible to use the Inline Encryption Engine on the M4 core with encrypted code stored in NOR flash on FlexSPI1?

Thank you!

[jingpan]

Hi @stephenschwartz ,

Please refer to this post. It can answer all your question.

https://community.nxp.com/t5/RT-4-Digit-10xx-11xx-12xx/iMXRTxxxx-Memory-Performance-ITCM-DTCM-L1-CAC...

But you must know that if both core run in one flexspi flash, the performance will crash down. 

The inline Encryption Engine will also take effect when M4 core access flexspi.

Regards,

Jing

[jingpan]

Hi @stephenschwartz ,

Sorry. The post has been converted to a pdf file and you can download it from here.

https://community.nxp.com/t5/i-MX-RT/Are-there-any-speed-test-comparison-fetching-from-different/m-p...

Regards,

Jing

[stephenschwartz]

Hi @jingpan ,

Thank you so much for your reply and for explaining. I would like to learn more about this from the link you posted, however, I am unable to access it. I contacted Carlos Enrique from NXP Tech Support to find out why I cannot access the link you included, and he said "this page is for only for a people who works in NXP that's why you can't access." Is there a way you can change the access or attach the document instead?

Thanks so much!

Steve Schwartz-Fenwick