Thank you very much, I wouldn't have been able to find the drivers otherwise.
I want to use the 8 MB NAND (MX30LF2G28AD) as mass storage.
I also have a 32 MB SDRAM (W9825G6KH) in parallel.
What else do I need to consider?
How should I set the pins?
If I configure the pins for the SEMC on the i.MX RT1061 with MCUXpresso using the SW_MUX_CTL registers, do the SW_PAD_CTL registers still influence the behavior of the pins, or is the behavior then determined solely by the SEMC?
According to the NAND datasheet, the SEMC_RDY requires a pull-up.