Hi @Mark16 ,
Thanks for your interest in NXP MIMXRT series!
Are you referring to operating SEMC NAND Flash or booting from SEMC NAND?
Since there is no NAND Flash connection provided on the EVK, there are no examples directly available in the corresponding SDK.
However, the necessary drivers are provided in this folder:SDK_2_16_000_EVK-MIMXRT1060\components\flash\nand\semc
If it is need to boot from SEMC NAND, you can refer to this document:
1. https://www.cnblogs.com/henjay724/p/9173425.html
2. https://www.cnblogs.com/henjay724/p/12591382.html
Best regards,
Gavin
Thank you very much, I wouldn't have been able to find the drivers otherwise.
I want to use the 8 MB NAND (MX30LF2G28AD) as mass storage.
I also have a 32 MB SDRAM (W9825G6KH) in parallel.
What else do I need to consider?
How should I set the pins?
If I configure the pins for the SEMC on the i.MX RT1061 with MCUXpresso using the SW_MUX_CTL registers, do the SW_PAD_CTL registers still influence the behavior of the pins, or is the behavior then determined solely by the SEMC?
According to the NAND datasheet, the SEMC_RDY requires a pull-up.
sorry, the NAND has 256 MB.
Hi @Mark16 ,
SW_PAD_CTL is also in play, and is the register where you configure the physical characteristics of the PAD when you use the PinConfigTool. Thinking of SW_MUX_CTL as "selecting" the signal routing, and SW_PAD_CTL as "adjusting" the physical characteristics.
SEMC in NXP's EVK doesn't connect to NAND, but I found a 3rd party example that might help you:
Also, there is a Chinese doc for your reference: https://doc.embedfire.com/mcu/i.mxrt/i.mxrt1052/zh/latest/doc/chapter29/chapter29.html
Best regards,
Gavin
Are there also SDK NAND drivers for ECC and Bad Block Management for the RT106x?
It is under this path: SDK_2_16_000_EVK-MIMXRT1060\components\flash\nand\semc
You can check out the drivers provided in this folder.