Sorry if this shows up twice, was not sure if forums are linked.
Hi Everyone,
Looking for guidance on the Flex-Qspi operations.
I currently have a project that communicates with a FPGA, and I have been successful using the AHB to get and set registers on that FPGA. The issues occur when I am in a for-loop requesting data consecutively. I can see on the scope, the Flexspi control line is not always being toggled and the read returns with the same data that it had on the last read cycle (on failure). It seems like some times it gets 3 reads in a row successfully and then it would skip 1 and only issue a read on the following attempt.
I have been able to add "NOP" wait states to my for-loop to delay the next data request and it seems to remedy the situation. I just dont have an answer to why that is the case.
Here is a brief overview of my configuration for the data transfer:
Using DDR, Caching is Disabled, Prefetch is Disabled, Clearing is turned On after read.
Here is a look at what my transmission looked like:
Transmissions without NOP wait states:
Transmissions with NOP wait states added:
Can anyone offer any idea as to why the AHB is not triggering the data transmissions?
Thanks.
Okay I believe I have a understanding of what is occurring.
My FPGA State machine is setup and based on 11 SClk cycles.
My Lut Table is also configured for this.
If i use the "FLEXSPI_TransferBlocking()" function to perform the read, it issues 11 SClk cycles, and I get the correct data.
If i use the AHB method, I only get 10 SClk cycles.
A colleague pointed out in the Reference manual. The READ_DDR instruction in the Lut table is ignored for AHB mode.
I guess a follow-up question to my original question is, how are data bytes supposed to be retrieved from an external device when using AHB? There is not enough SClk cycles to do any more than a byte at a time. which, we currently are using a 2 Byte Data transfer. Which explains my failure.
Thanks for your time.
Thank you for sharing this information.
What is the size of your AHB read buffer? With the NOP are you consistenly reading all the requested data?
Diego
There were two different things I was dealing with...
As you may have been informed by your dedicated FAE , we are looking a your issue, I will get back to you soon with our feedback , or a question if we need to.
So far, did you found out another detail, or error, to discuss within your FPGA implementation? Just to consider it.
Thank you very much
Diego
Hello @scottydoesntknow
Thank you very much for your patience, I have been consulting this internally, please find below our feedback.
For your case, it is better to use FlexSPI IPG cmd to communicate with FPGA for register settings.
For "The READ_DDR instruction in the Lut table is ignored for AHB mode", the understanding is not correct, just the operand value of READ_DDR sequence will be ignored, as the burst data length is determined by AHB master.
For "how are data bytes supposed to be retrieved from an external device when using AHB?" This is determined by AHB burst mechanism. Our colleague Jay Heng, created the below articles can can help.
Please note that a traducction from Chinesse to english can be done using a web brower with this feature, this material is part of his personal blog.
If you get any troubles or further questions please feel free to let us know.
Diego
Perfect! thanks for your reply @scottydoesntknow