Hi all.
We use RT1052 in our customer board. An on-chip DCDC power-down issue happened occasionally while the device was operating under normal conditions.
We suspect that the device enter SNVS mode unexpectedly.
When this glitch occurs, the DCDC drops to 0V and the core become unaccessible via SWD interface. But while we try to short the M6 (ONOFF) pin to GND ,the DCDC power up and the devide restored.
Can it confirm that the device enter SNVS mode indeed?
---
We aim to wake up the device automatically using SRTC alarm, but it's not working.
We test both RTC and SRTC alarm in full speed mode, and SNVS_HP_WRAPPER_IRQHandler() was triggered by RTC source kSNVS_RTC_AlarmInterruptFlag. However, it appears that no activity or response was triggered by the SRTC alarm.
Then we set SRTC alarm and attempted to enter SNVS mode with following code:
```
SNVS->LPCR |= SNVS_LPCR_TOP(1);
```
But the device can not wake up. We read the counter register like the demo snvs_lp_srtc in sdk, the srtc timer still working.
Have any suggestion or what i did is wrom? Please kindly reply.
Best Regards
sinsera
SNVS->LPCR |= SNVS_LPCR_TOP(1);
The other is to press the ONOFF button for more than 5 seconds. You can use an oscilloscope to see if the ONOFF button is pressed for a long time. During this period, check whether the code is executed unexpectedly through the software.
B.R,
Sam
Hi @Sam_Gao
Thank you for your reply!
We modified the code based on the power_mode_switch demo, and the SRTC was able to wake up the core, but it's unstable.
We have disabled the long-press function by the following code:
SNVS->LPCR &= ~SNVS_LPCR_BTN_PRESS_TIME_MASK;
SNVS->LPCR |= SNVS_LPCR_BTN_PRESS_TIME(3);
SNVS->LPCR &= ~SNVS_LPCR_DEBOUNCE_MASK;
SNVS->LPCR |= SNVS_LPCR_DEBOUNCE(2);
and we do not invoke this code under normal conditions:
SNVS->LPCR |= SNVS_LPCR_TOP(1);
so, it seems that the device will not enter the SNVS mode, but somehow, it's still hanppened. Is there any other way to enter the SNVS mode, like power supply fluctuation? Or is it possible that a reset event occurred, but DCDC failed to work out, and device looks like enter the SNVS mode?
Further, for stability, we are working out that bypass the on-chip DCDC, with an additional 1.2V power supply board, welded to the original board. It is an extremely rare process. Any information will be helpful.
condition_A:
const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN =
{
.loopDivider = 88,
};
...
CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
condition_B:
const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN =
{
.loopDivider = 100,
};
...
CLOCK_SetMux(kCLOCK_PrePeriphMux, 0);
And it needed to drop the core to 528MHz. We found two ways to do that, wondering which will make the device work more stably.
br
sinsera
Hi @SinSera
If the power supply is unstable, a reset event, it might cause the device to enter SNVS mode unexpectedly, so please doube check.
Actually, the additional 1.2V power supply board we can't support it to work on overdrive mode which need at least 1.25V.
Please see https://www.nxp.com/docs/en/data-sheet/IMXRT1050IEC.pdf section 4.1.3, table 10.