On the latest data sheet, when boot loader from UART1, Table 79 show 4 pins are used,
But on reference manual table 8-1 as follows:
Only two pins are needed. Which one I should to use, if the UART1 port does not use CTS and RTS signals, is boot loader still to talk the device? Where I can find more information regarding the ROM bootloader?
When boot from FlexSPI, it lists a hyper flash as follows:
Is the ROM boot loader works with QSPI flash on FLEXSPI_A or FLEXSPI_B port, if yes, how it behaviors? Which IC is selected first? FLEXSPI_A_SS0_B or FLEXSPI_B_SS0_B? What is required connections?
Any help is appreciated! Thank you in advance!
Solved! Go to Solution.
Hi Jian Li,
The ROM bootloader supports booting through UART with RX/TX only (no hardware flow control). Additionally, I do not know of any other documents with deep information on the ROM bootloader, but I will ask around and let you know if I find something useful. For instance you can take a look here:
https://www.nxp.com/docs/en/application-note/AN12107.pdf
Regards,
Carlos
NXP Technical Support
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Hi Jian Li,
The ROM bootloader supports booting through UART with RX/TX only (no hardware flow control). Additionally, I do not know of any other documents with deep information on the ROM bootloader, but I will ask around and let you know if I find something useful. For instance you can take a look here:
https://www.nxp.com/docs/en/application-note/AN12107.pdf
Regards,
Carlos
NXP Technical Support
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Hi, Carlos_Musich: Thank you for help and promise for more info.