Query: Is Cortex-M7 affected by ARM Errata 838869?

[mastupristi]

Hello everyone,

I’m investigating whether ARM Errata ID 838869 (“Store immediate overlapping exception return operation might vector to incorrect interrupt”) affects Cortex-M7 cores, in addition to the documented Cortex-M4/M4F variants.

1. ARM Cortex-M7 Errata Notice (SDEN-1068427, v11.0, May 28 2024)
   I reviewed the ARM Software Developer’s Errata Notice for Cortex-M7 (AT610/AT611) and did not find ID 838869 listed in the errata summary table
2. STMicroelectronics STM32H7 Errata (ES0445 Rev 5, Sep 2024)
   The STM32H7 device errata sheet groups errata 838869 under “Arm 32-bit Cortex-M4 core” (section 2.2.3) and does not list it under “Arm 32-bit Cortex-M7 core”
3. NXP MCUXpresso SDK (all recent release)
   Despite the above, the MCUXpresso SDK’s fsl_common_arm.h driver defines:

/*! @name ISR exit barrier
 * @{
 *
 * ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
 * exception return operation might vector to incorrect interrupt.
 * For Cortex-M7, if core speed much faster than peripheral register write speed,
 * the peripheral interrupt flags may be still set after exiting ISR, this results to
 * the same error similar with errata 83869.
 */
#if (defined __CORTEX_M) && ((__CORTEX_M == 4U) || (__CORTEX_M == 7U))
#define SDK_ISR_EXIT_BARRIER __DSB()
#else
#define SDK_ISR_EXIT_BARRIER
#endif​

implying NXP applies a DSB barrier at ISR exit on both M4 and M7 cores

Questions:

• Can anyone confirm whether Cortex-M7 silicon is officially free of errata 838869?
• If so, is the SDK_ISR_EXIT_BARRIER (__DSB()) on M7 purely to guard against peripheral-write latency/race conditions rather than a core bug?

Thanks in advance for any insights!

best regards

Max

[mayliu1]

Hi @mastupristi ,

Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.

To better answer your question, I consulted an SDK expert on this field.

The reply is that the SDK Cortex-M7 has no relation to Errata 838869.  

The SDK_ISR_EXIT_BARRIER (__DSB()) on M7 is primarily intended to prevent peripheral write latencies/race conditions.

Wish you a nice day!

Best Regards
MayLiu

[mastupristi]

Hi @mayliu1 

can you ask the SDK experts if they can provide an example of FW that highlights problems without the barrier?

best regards

Max

[mayliu1]

Hi @mastupristi ，

Thanks for your updated information.

I am sorry that we do not provide  examples of this type of FW.

Wish you a nice day!

Best Regards
MayLiu