Hi May,
A PWM counter's modulo would be the ratio between the counter clock frequency and the target PWM frequency. The modulo has a maximum value of 65,536, as the counters are 16-bit length.
In the example the IPG clock is 50MHz, and the counter prescaler bit field is 0, and the target PWM frequency is 500Hz. So the ratio is 50,000,000 / (2^0) /500 = 100,000 > 65,536
To solve the problem the prescaler is supposed to be configured to a proper value. For example, let's configure the IPG clock to be the conventional 150MHz, and the prescaler to be 8.
CLOCK_SetDiv(kCLOCK_AhbDiv, 0x0); /* Set AHB PODF to 0, divide by 1, 600Mz/1=600MHz */
CLOCK_SetDiv(kCLOCK_IpgDiv, 0x3); /* Set IPG PODF to 3, divede by 4, 600MHz/4=150MHz */
pwmConfig.prescale = kPWM_Prescale_Divide_8;
With these modifications, the ration would be 150,000,000 / 8 /500 = 37,500 < 65,536, which is acceptable by a counter's modulo.
Hi,
The PWM example in SDK generates a 1KHz signal from PWM submodule_0 and submodule_1 in complementary mode. I want to run a servo motor using PWM. The servo uses a 50Hz signal i.e. 20ms.
So, anyone can help me where the modification is required for the same?
I am using imxrt 1176.
Thanks in advance.
Hi May,
A PWM counter's modulo would be the ratio between the counter clock frequency and the target PWM frequency. The modulo has a maximum value of 65,536, as the counters are 16-bit length.
In the example the IPG clock is 50MHz, and the counter prescaler bit field is 0, and the target PWM frequency is 500Hz. So the ratio is 50,000,000 / (2^0) /500 = 100,000 > 65,536
To solve the problem the prescaler is supposed to be configured to a proper value. For example, let's configure the IPG clock to be the conventional 150MHz, and the prescaler to be 8.
CLOCK_SetDiv(kCLOCK_AhbDiv, 0x0); /* Set AHB PODF to 0, divide by 1, 600Mz/1=600MHz */
CLOCK_SetDiv(kCLOCK_IpgDiv, 0x3); /* Set IPG PODF to 3, divede by 4, 600MHz/4=150MHz */
pwmConfig.prescale = kPWM_Prescale_Divide_8;
With these modifications, the ration would be 150,000,000 / 8 /500 = 37,500 < 65,536, which is acceptable by a counter's modulo.