Hi,
I work as a system engineer and now am architecting one new product. NXP RT500 is a quite interesting candidate, however, by searching the forum it was found that legacy NXP MCU product does not support using Timer and repetition counter to generate a pulse train on GPIO with precise pulse number control without interferring CPU, which can be supported by STM32 MCU.
How is the status of RT500 product? Is a similar solution supported now? If not, could you please provide any avaialble solution which is not based on CPU interrupt?
Thanks
// JC1985
Hi @JC1985 ,
Thank you for your interest in the NXP MIMXRT product, I would like to provide service for you.
I checked the RT500 UM, really didn't find the output defined PWMs without the CPU, normally, we can use the interrupt to know how many PWM generated, then to stop it. This method still need the CPU.
But, I can help you to double check with our internal expert about this function, any updated information, I will let you know.
Wish it helps you!
If you still have question about it, please kindly let me know.
Best Regards,
kerry
Hi @JC1985 ,
To the DMA, normally, we send the counter to the timer register, which is the compare value, to get the different PWM duty, not the stop. Maybe you can try to set the duty to 0 or 100%, I think that also can be seemed as the PWM stop, right?
If this method, then you can transfer the DMA data to the timer.
Wish it helps you!
Best Regards,
Kerry
Hi, @kerryzhou
Thanks for your reply. It is understood that normally the DMA is used to configure the compare value of the counter in timer thus to change the duty cycle of the PWM. Is the DMA also able to write start/stop control register of the timer? This is one question.
Another question is regarding the Timer's Counter mode. From the reference manual, it is believed that an Input GPIO's up/down pulse can be counted by the Timer which is configured to Counter Mode, right? If it is the case, can the Counter mode be configured to realize the following function:
The counter works in a fashion that everytime after a pre-set N counting number is achieved, it sends a trigger to DMA and restarts a new round of counting automatically.
Thanks
// JC1985
Hi @JC1985 ,
Thanks for your updated information.
1. About the DMA to change the control register of the timer
It's OK, my understanding is when you set the DMA, just set the DMA destination address to the control register of the timer. In fact, it is the memory to memory data transfer with DMA.
2. restarts a new round of counting automatically.
My understanding is the same operation, just control the related register, to clear the count, then do the new counting again.
Wish it helps you!
If you still have question about it, please kindly let me know.
Best Regards,
Kerry
Hi, @kerryzhou
Thanks for your reply.
"My understanding is the same operation, just control the related register, to clear the count, then do the new counting again."
What do you mean by "just control the related register"? Does it mean that to restart the count function again, CPU to configure register is needed? For a better and clear understanding, could you please show more detailed information using, reference manual, example project or application note?
Thanks!
// JC1985
Hi @JC1985 ,
My understanding is two way:
1. clear the counter register
2. restart the counter again
About the code, you can refer to the RT500 SDK:
C:\KerryPC\IMXRTCode\Practice\RT500\SDK_2_15_000_EVK-MIMXRT595\boards\evkmimxrt595\driver_examples\sctimer
We don't have other code and documents now, you also can check the timer driver, not only sctimer, eg, other timer which can generate the PWM:
SDK_2_15_000_EVK-MIMXRT595\boards\evkmimxrt595\driver_examples\ctimer
If you still have question about it, please kindly let me know.
Best Regards,
kerry
Hi, @kerryzhou
Thanks for your reply. Does following message mean that the CPU or DMA involvement is a must, the counter cannot automatically restart counting by itself?
--------------------------------------------
My understanding is two way:
1. clear the counter register
2. restart the counter again
---------------------------------------------
Thanks.
// JC1985
Hi @JC1985 ,
Yes, need the CPU to clear the register, to the counter self, normally just when it overrun, it will counter again,
So, still need the CPU to clear the register to restart the counter.
Wish it helps you!
Best Regards,
Kerry