NTA5332 How to put into continuous Transmit mode using I2C

[Naeem]

Hi we are using NTA5332 in our system for NFC. It is connected to the RT1062 via I2C. Need to put its RF to transmit mode continuously for RED testing. Need support how can we do it via I2C? 

[Naeem]

Hi @EduardoZamora I am now trying to read 4 bytes from ED Status Register 0x10A0 over I2C, And I am getting 0xFFFFFFFF in return which doesnt seem to be correct. Reading 100A which is RFU, it returns 0x00000000 which seems to be correct. Also when I am trying to write 0x01 to 0x10A8, I am getting NACK from chip. 

[EduardoZamora]

Hi,

Could you please confirm that you are following the command structures are described in NTAG 5 boost, Section 8.3.1.4 Command Set?

Also, it would be very helpful if you could provide a capture of the data exchange by an oscilloscope or logic analyzer.

Regards,
Eduardo.

[Naeem]

Hi Eduardo,

Thank you for your reply. I am trying to write to SRAM using Write Memory command format, but I am getting NACK when sending data to SRAM. I am following the process in steps described below which are also shown on Logic analyzer pictures.

Step 1:

• Read 0x103D for ED Config using Read Memory Command format
• Write 0x00000000 to 0x103D for ED Config using Read Memory Command format

Step 2:

• Read 0x10A0 Byte 0 for ED Status using Read Register Command format
• When NFC detected, Read value is 0x03, then move to step 3

Step 3:

• Write 0x10A1(CONFIG_1_REG),  Byte 1, 0x0F, 0x0A using Write Register Command format
• Write 0x10A8(ED_CONFIG_REG),  Byte 0, 0x03, 0x03 using Write Register Command format

Step 4:

• Write 0x2000(SRAM_PAGE_0),  0x12345678 using Write Memory Command format

Please have a look and give feedback about the issue here.

[EduardoZamora]

Hi,

SRAM is only available when supplied by VCC and SRAM_ENABLE bit is set to 1b. Also, by any chance, have you performed any other operation on the SRAM block you are trying to write?

According to NTAG 5 Boost Data Sheet, Section 8.3.1.5 Error Handling, NTAG 5 Boost will respond with a NACK on the first byte if the SRAM block is not writable.

Regards,
Eduardo.

[Naeem]

Hi,

I am following AN12364 section 6.2 where it says write SRAM_ENABLE=1 in 10A1 Register, but according to data sheet, it seems this bit is only readable. Is that the problem here that SRAM should be enabled from 1037h register?

[EduardoZamora]

Hi,

Please, try setting SRAM_ENABLE bit in 1037h.

Regards,
Eduardo.

[Naeem]

Hi,
I have done the following.

Read 1037 register contents, with ACK
Modified the Byte 1 lower 4 bits to 0xA, written 4 bytes to 1037 Register
After that, Tried to write SRAM, got a NACK.

On next boot, my step1 is getting NACK on Reading 0x103D and my whole testcase fails.

Regards,

Naeem

[EduardoZamora]

Hi,

Just to confirm, you are using a custom NTAG 5 Boost-based board, is this correct?

Changes to configuration registers should take effect after the next POR. By any chance, are you getting NACK when trying to read any other register? Are you able to READ 1037h after the POR to check if the configuration was done?

I tried writing SRAM_ENABLE in configuration register CONFIG1, then reset NTAG 5, and read CONFIG1 and EDCONFIG configuration registers after that by using NTAG 5 I2C Cockpit, and no errors were thrown:

> Reading configuration register CONFIG1:

I2C>> S A8 10 37 P

I2C>> S A9 08 02 FF 00 P

> Reading configuration register EDCONFIG:

I2C>> S A8 10 3D P

I2C>> S A9 00 00 00 00 P

The same is observed by using RFID Discover and Pegoda 3. If there is an additional step I should perform, please let me know.

Regards,
Eduardo.

[Naeem]

Hi Eduardo,
Thanks for running this test on your side, but I dont have the NTAG based board, only the NTA53321G0FTTZ on our custom board. So at this moment, when I try to read the 1037 register in the start of the test, I am getting a NACK.

[EduardoZamora]

Hi,

By any chance, is your application based on an RT1062 SDK demo app?

If you are receiving the NACK on BL_AD0 byte, this could mean that I2C interface is disabled; have you performed any I2C lock operation?

A Reference Manual including application flow and a few code snippets for KW41 can be found in NTAG 5 - Firmware development for KW41Z. Although it is for KW41, perhaps it could be a good reference.

Regards,
Eduardo.

[Naeem]

Hi Eduardo,

Thank you for your answer. Is it possible to send some data over i2c channel to NTAG which it can send to a NXP NFC taginfo app on iphone?

[EduardoZamora]

Hi,

You may find some useful information in NTAG 5 - Bidirectional data exchange.

Regards,
Eduardo.

[EduardoZamora]

Hi,

By any chance, are you looking for a way to make NTA5332 to constantly generate a field/signal by itself? If that is the case, this device should be intended to behave as a passive tag, so it may not be possible for it to generate a field.

Regards,
Eduardo.