Multicore

[Vishnu123]

Hi,

I have a standalone project that currently runs on cm7 core of IMXRT1176. I want to modify the project to create a multicore setup, where cm7 acts as the master, and cm4 is utilized as the slave. 

Could anyone guide me on how to create a cm4 slave project to work alongside my existing cm7 project? What steps are required to configure cm7 as the master. Any specific details on memory mapping, or project configuration would be helpful.

[Vishnu123]

Hi @Masmiseim @mayliu1 ,

Thanks for your input, I was able to convert the single core project to multicore.

Currently I am trying to move some functions from m7 to m4, but the triggering should happen from m7. I was thinking of utilizing shared memory to set up a flag for each function and m4 will check the flag and call functions if the flags are set from m7. The drawback is the that actual flow of the code flow will be affected since m7 will not wait for the function in m4 to complete in the current method that I am following.

Is there any method that is suitable for this situation. Is rpmsg method a possible solution for this? If so, how to implement this in an already generated project where the middleware for rpmsg is not included while creating.

Regards,

Vishnu

[mayliu1]

Hi @Vishnu123 

Thank you for your updated information,  I would  like to provide service for you.

I think utilizing shared memory can meet your needs.

Please refer to SDK demo.

Best Regards

mayliu

[mayliu1]

Hi @Vishnu123 ,

Thank you for your interest in the NXP MIMXRT product, I would  like to provide service for you.

The main core is selected by eFuse, the default CM7 is the main core, if you need to change the main core to CM4, you need to flash eFuse.

I recommend that you refer to the documentation below：

 i.MX RT1170 Dual Core Application (nxp.com.cn)

Also， NXP SDK library support a lot of routines.

Wish it helps you.
If you still have question about it, please kindly let me know.

Best Regards

mayliu

[Masmiseim]

Hello @Vishnu123,

It is actually quite simple. You create a separate application for the M4 core, the only important thing is that no resources, especially RAM and flash, are used that the M7 core uses. Both cores can run from the flash (on different addresses) via XiP. If the M4 application is an XiP application, then it only needs to be started from the M7. To do this, write the address of the vector table of the M4 core in IOMUXC_LPSR_GPR->GPR0/1 and then set the SRC_SCR_BT_RELEASE_M4_MASK flag.
I have created an example project at (https://github.com/Masmiseim36/Coremark_iMXRT) that runs Coremark on both cores. Rowley Crossworks is used as the development environment.

Regards