Hello NXP Community,
I am working with the MIMXRT1176DVMAA processor and attempting to interface two W9812G6KH SDRAM chips (2M x 4 BANKS x 16 BITS each).
My goal is to test this SDRAM configuration within the NXP's IDE. I have reviewed the existing EVK example SEMC SDRAM provided, but I'm finding it challenging to adapt them specifically for interfacing two W9812G6KH devices with the MIMXRT1176.
Could anyone please provide guidance or an example on how to properly configure the SEMC for this dual-SDRAM setup? Specifically, I'm looking for details on:
SEMC register configurations (e.g., timing parameters, address mapping) for dual SDRAM.
Any necessary modifications to the linker script or memory map.
DCD (Device Configuration Data) for this SDRAM.
Any help or pointers to relevant documentation/examples would be greatly appreciated!
Thank you in advance.