Hi,
On my custom board based on IMXRT1175 processor, I found the M7 and M4 core voltage (VDD_SOC_IN and VDD_LPSR_DIG) all close or reached the high limitation of 1.15V, under the operating condition M7 core at 500Mhz, M4 core at 240Mhz. So, it seems that the actual core voltage is high at a middle working frequency, and my questions are:
1. is this -1.15V core voltage- normal condition?
2. can I reduce the core voltage and how to do this?
Many thanks!
Hi @TCL_1 ,
1. Yes. This is because the DCDC output voltage will not change automatically. You must change it by software.
2. You can use DCDC_AdjustTargetVoltage() function to set DCDC output voltage, which can be found in fsl_dcdc.c. Please refer to pwer_mode_switch example to see how to use it.
Regards,
Jing