IMX1170 EVKB - SPI communication dataloss Issue while Running LVGL task and SPI task in FreeRTOS

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IMX1170 EVKB - SPI communication dataloss Issue while Running LVGL task and SPI task in FreeRTOS

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Sreenath_P
Contributor II

Facing issue while LVGL task and SPI task is running , the Data is lost if the LVGL task is running . if LVGL task is commented the SPI doesn't have a dataLoss . The SPI is running at 2 MHZ , We are using LPSPI_SlaveTransferNonBlocking() . 
the SPI peripheral is configured as Transfer. 

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Sam_Gao
NXP Employee
NXP Employee

Hi,

It is a reasonable avice to increase your SPI task's priority above LVGL's, or optimize LVGL's performance (e.g., reduce refresh rate, simplify UI), and ensure no critical sections in LVGL are disabling interrupts for too long.

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Sreenath_P
Contributor II

@Sam_Gao @Jack310West 
Current lvgl TASK Priority is less than SPI task Priority .
I have tried Changing Refresh rate and didn't find any significant Improvement .
in the freertos config We have Time Slicing enabled , preemption is also Enabled

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Sam_Gao
NXP Employee
NXP Employee

Hi,

Please refer to the offical lvgl examples to see if there are some performance issues based on the same hardware.

Also, you can find how to improve performance if you use NXP GUI Guider tools for developement. 

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Sreenath_P
Contributor II

by reducing Clock Speed it works better ,but 2 mhz is needed for our use case , any other suggestions, i tried reducing refresh rate and there is not much of difference

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Jack310West
Contributor I

Hello!

Your SPI data loss when LVGL is running, but not when LVGL is commented out, strongly indicates resource contention or CPU starvation. The LVGL task is likely consuming too many CPU cycles, preventing your SPI task or its interrupt service routine (ISR) from processing LPSPI_SlaveTransferNonBlocking() completions promptly. Increase your SPI task's priority above LVGL's, optimize LVGL's performance (e.g., reduce refresh rate, simplify UI), and ensure no critical sections in LVGL are disabling interrupts for too long. Temporarily reducing SPI clock speed can also help confirm if it's a throughput bottleneck. 

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