Hi Hu
yes this should be possible using the DCD code, as it is configured by
IOMUXC_GPR_GPR17 register and described in AN12077 Using the i.MX RT FlexRAM
https://www.nxp.com/docs/en/application-note/AN12077.pdf
Also this may be configured with fuse Default_FlexRAM_Part - Default FlexRAM RAM bank partioning
described in Table 5-9. Fusemap Descriptions i.MXRT1050 Reference Manual.
Best regards
igor
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