How to generate usable system clock in PTP/1588 slave

[avrobot]

Hi, on the iMx RT there is an example mentioned in AN12149 that synchronizes a 1PPS timer to a network clock. 

In theory I can use the 1PPS output to generate a usable network synchronized system clock (such as 6.144Mhz or 24Mhz) by using an external PLL that accepts 1PPS input however all the IC's available to achieve that are super expensive so are not an option. I'm also concerned that using the 1PPS to generate a stable local system clock will have too slow response and not adjust for short duration drift in the network clock.

There must be a way to generate a system clock either without an external PLL or with a lower cost external clocking chip.

1. Is it possible to change the "Adjustable Timer Module" in the 1588 block to a much higher frequency than 1PPS without too much penalty in resultant sync accuracy? This higher freq clock could be fed back into the iMx (say into CLK1 pin) then have internal iMx PLL (PLL3 or PLL5) generate internal clock? 

2. Is it possible to change the "Adjustable Timer Module" in the 1588 block to a much higher frequency than 1PPS and feed it directly to an output pin (rather than through an interrupt)?

Any thoughts welcome.

[Sabina_Bruce]

Hello Eza,

Hope you are doing well.

I want to make sure I am understanding your principal objective. First could you please confirm which imXRT you are using so that I can provide the correct information you are requesting. 

Also from my understanding is that you would like to use a 6.144MHZ or 24MHZ clock without the use of an external PLL, is that correct?

Best Regards,

Sabina

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[avrobot]

Hi Sabina, the target processor is iMxRT 1052. Yes I am trying to figure how to generate these clocks synced to network clock without external pll. If there is no way to achieve without external pll then it should be low cost (under $3) pll to make our project feasible.

Thanks. Eza.

[Sabina_Bruce]

Hello Eza,

Hope you are doing well.

The external signals of the ethernet module are provided in table 41-2 of the reference manual. Please refer to the description of how the signal can be used. The output of the timer module is through an event generator, it is not possible to redirect internal signal of the timer to a pin. 

Although you are able to use the PPS signal, its purpose is to help measure the time synchronization. It is not used to feed a PLL and consequently provide the clock for other modules. 

I believe what you are looking to use, will be a reference clock. You may use the reference clock use to synchronize with the PHY or the feedback clock that PHYs provide. These are at a much higher frequency.

Best Regards,

Sabina

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[avrobot]

Hi Sabina, yes I believe what we are after is to access the reference clock that is sync'd to IEEE-1588. What I am confused about is how to access this clock.... 

1> Are you saying that ENET_REF_CLK in table 41-2 adjusted by IEEE1588 through network synchronization? I don't see any other ENET ref clock output from the chip. 

2> Also what reference clock drives the free-running timer used to generate the PPS signal? It's not clear to me.

Thanks!

[Sabina_Bruce]

Hello Eza,

Hope you are doing well.

1> Yes, or you may also use the reference clock pin from the ethernet phy.

2>Details on the enet_clk please refer to section 14.6.1.3.6 Ethernet PLL 6. The adjustable timer module described in also depends on the value programmed for the Clock Period Of The Timestamping Clock in the register ENETn_ATINC. 

Best Regards,

Sabina

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