Hello,
When using eFlexPWM in complementary mode, setting the OUTEN bits immediately sets PWM B to high (active) before even setting the LDOK bit or starting the timer. Here is an example of running just the PWM_SetupPwm() function which sets OUTEN bits at the end and without PWM_SetPwmLdok() and PWM_StartTimer() functions:
This results in PWM B being high before the first cycle starts. I uploaded a slightly modified PWM example from the SDK for MIMXRT1060-EVKB so you can easily test this yourself. This effect might be unnoticeable in lower PWM frequencies, but it is a big problem in higher frequencies (700Khz is set in the attached files). Here is a screenshot of the problem:
PWM B (red) is high for a relatively long time before the first cycle of PWM A (blue) which is undesired behavior for our application. I managed to slightly reduce this problem by commenting out the OUTEN line in PWM_SetupPwm() and adding it just before PWM_StartTimer(). Here is the result:
However, PWM B is still active before the first cycle, the time is just shorter because the operations were rearranged. I tried setting the OUTEN bits after starting the timer, but this enables the PWM outputs when the timer is already running, so they start at a random time of their cycle:
Is the PWM B going high when setting the OUTEN bits (before LDOK and starting the timer) expected behavior? Is there any way to avoid it going high and have the complementary PWM start properly?
I tried using the original code, but this doesn't help to fix the issue, and I'm only using one module so synchronization between different modules does not seem relevant here. I uploaded the original PWM example from SDK, with the only change being removed clock dividers (use max available 150Mhz bus for PWM), reduced dead time and increased PWM frequency to 600khz. This is the output on PWM1 Submodule 0 pins A and B:
As you can see the issue is still very apparent.
