How do you run an SDK example entirely from SDRAM?

[ahollom]

Hello,

I am evaluating the Cortex M7 using the iMXRT1050EVKB and the IAR IDE with an IAR I-Jet. I have successfully managed to build some of the SDK demo projects like led_blinkey, and have incorporated some benchmarking code to validate its operation. So far, I have executed my benchmarks from FlexRAM (text in ITCM and data in DTCM) with processor caches on and off and noted no performance change (expected, as FlexRAM bypasses the caches), and I have also executed it with the text in ITCM and data in SEMC0 (SDRAM) and noted that performance degrades if the data cache is disabled but does not change if the instruction cache is disabled (expected, as SEMC0 uses the data cache and ITCM bypasses the instruction cache).

Now, what I'd really like to do is to put the text segment into SEMC0 (SDRAM) to measure performance relative to having it in ITCM. I have tried this and while the program downloads and pauses at main(), as soon as it is executed I get a MemManage fault.

I have attached the ICF file, so hopefully someone can suggest what requires altering.

Thanks in advance.

[tamir_michael]

MPU settings...?

[ahollom]

Hello Tamir,

The SDRAM is located at 0x80000000 and is configured thus:

    /* Region 7 setting: Memory with Normal type, not shareable, outer/inner write back */
    MPU->RBAR = ARM_MPU_RBAR(7, 0x80000000U);
    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_32MB);

This has the same settings as the ITCM, DTCM and OCRAM, which are configured thus:

    /* Region 4 setting: Memory with Normal type, not shareable, outer/inner write back */
    MPU->RBAR = ARM_MPU_RBAR(4, 0x00000000U);
    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);

    /* Region 5 setting: Memory with Normal type, not shareable, outer/inner write back */
    MPU->RBAR = ARM_MPU_RBAR(5, 0x20000000U);
    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);

    /* Region 6 setting: Memory with Normal type, not shareable, outer/inner write back */
    MPU->RBAR = ARM_MPU_RBAR(6, 0x20200000U);
    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_256KB);

I thought my problem might be eXecute Never related, as this is meant to be supported from ARM v6 onwards, but the header "mpu_armv7.h" I am using does not seem to cater for XN in the ARM_MPU_RASR macro (though the header "mpu_armv8.h" does, though operates differently in that it seems to do it all in ARM_MPU_RBAR).

I have managed to get the code I am benchmarking into SDRAM, but have to use the following pragma coupled with an ICF file "place" directive.

#pragma default_function_attributes = @ "BENCHMARKS"

So, this isn't really holding me up any more, but it would still be nice to understand why the problem occurs.