Help needed to understand NOR Flash customLUT

[rd24]

Hi,

I am implementing an application to do NOR Flash operations on a custom board. MCU - iMXRT1040, SDK - mcuXpresso SDK v2.16

I am trying to understand the "flexspi\nor\polling_transfer" example, specifically the customLUT section in "flexspi_nor_polling_transfer.c":

const uint32_t customLUT[CUSTOM_LUT_LENGTH] = {
    /* Normal read mode -SDR */
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x03, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL + 1] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

    /* Fast read mode - SDR */
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x0B, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST + 1] = FLEXSPI_LUT_SEQ(
        kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_1PAD, 0x08, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),

    /* Fast read quad mode - SDR */
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xEB, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, 0x18),
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD + 1] = FLEXSPI_LUT_SEQ(
        kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 0x06, kFLEXSPI_Command_READ_SDR, kFLEXSPI_4PAD, 0x04),
...

I see the array initialization is not sequencial, i.e. the first item "NOR_CMD_LUT_SEQ_IDX_READ_NORMAL" is initializing array element 7, the 2nd item "NOR_CMD_LUT_SEQ_IDX_READ_FAST" is initializing array element 13.

The below macros defined in "app.h" are the indexes but they are random.

#define NOR_CMD_LUT_SEQ_IDX_READ_NORMAL        7
#define NOR_CMD_LUT_SEQ_IDX_READ_FAST          13
#define NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD     0
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS         1
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE        2
#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR        3
#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE 6
#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD   4
#define NOR_CMD_LUT_SEQ_IDX_READID             8
#define NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG     9
#define NOR_CMD_LUT_SEQ_IDX_ENTERQPI           10
#define NOR_CMD_LUT_SEQ_IDX_EXITQPI            11
#define NOR_CMD_LUT_SEQ_IDX_READSTATUSREG      12
#define NOR_CMD_LUT_SEQ_IDX_ERASECHIP          5

My questions are:

- why these indexes are not sequential, is there any particular reason?

- am I misunderstanding the customLUT initializer?

Regards,

RD

[MultipleMonomials · Accepted solution]

Ah yeah I've dug into this before in my work on Mbed. These indices are just chosen arbitrarily. The LUT has 16 sequence entries, all identical, and the SW can put each sequence in any location. The only real restriction is that if a sequence is longer than 8 instructions (I think) it will take up multiple sequential entries in the LUT.

How does it "know" which one to execute? Well, for regular (AHB bus) reads and writes to the flash, this is controlled via the FLSHxxCR2 ARDSEQID and AWRSEQID fields. These are generally set by the software to point to the read and write sequences in the LUT. If you are using the FSL HAL, this is configured via flexspi_device_config_t::ARDSeqIdx and flexspi_device_config_t::AWRSeqIdx.

And for things outside of reads and writes, these are done by simply telling FlexSPI to execute a specific sequence number with FLEXSPI_TransferBlocking(). So the FlexSPI doesn't actually need to know what the sequences do.

[rd24]

Thanks.

So, if I modify these indexes in any order it should work right?

[MultipleMonomials]

Should do!