According to the documentation (UM11147) when configuring the FLEXCOMM / I2S we have to
Select a clock sources and dividers for the Flexcomm using the related CLKCTL1_FRGnCLKSEL, CLKCTL1_FRGnCTL, and CLKCTL1_FCnFCLKSEL register
is this valid also when we have to use I2S in SLAVE mode (kI2S_MasterSlaveNormalSlave)?