Flashloader can not jump to application image

[longxing]

I'm debuging the flashloader program imported from SDK(SDK_2_11_1_EVKB-IMXRT1050\boards\evkbimxrt1050\bootloader_examples\flashloader) on my custum MXRT1052 board.Two problem are encountered:

(1)The flashloader can not erase FlexSPI Nor Flash.It does execute the erasing code,but fail when verify FLASH content.

(2)The flashloader can not jump to APPLICATION.As the flashloader can't erase the FLASH,i use J-FLASH tool to download my APPLICATION code at flash address 0x60010000.Then modify the get_active_peripheral() function to jump directily to APPLICATION(

only comment out statement :

//if (!is_boot_pin_asserted() && is_application_ready_for_executing(applicationAddress))

and

//if (is_direct_boot())

).Fallowing code is the modified get_active_peripheral() function:

static peripheral_descriptor_t const *get_active_peripheral(void)
{
    ...///< 

#if !BL_FEATURE_TIMEOUT
#if BL_FEATURE_POWERDOWN
    bool shortTimeout = false;
#endif
    const uint64_t ticksPerMillisecond = microseconds_convert_to_ticks(1000);

    // Get the user application entry point and stack pointer.
    uint32_t applicationAddress, stackPointer;
    get_user_application_entry(&applicationAddress, &stackPointer);

    uint64_t lastTicks = 0;    // Value of our last recorded ticks second marker
    uint64_t timeoutTicks = 0; // The number of ticks we will wait for timeout, 0 means no timeout

    // If the boot to rom option is not set AND there is a valid jump application determine the timeout value
   // if (!is_boot_pin_asserted() && is_application_ready_for_executing(applicationAddress))
    {
        //if (is_direct_boot())
        {
            jump_to_application(applicationAddress, stackPointer);
        }

        // Calculate how many ticks we need to wait based on the bootloader config. Check to see if
        // there is a valid configuration data value for the timeout. If there's not, use the
        // default timeout value.
        uint32_t milliseconds;
        if (configurationData->peripheralDetectionTimeoutMs != 0xFFFF)
        {
            milliseconds = configurationData->peripheralDetectionTimeoutMs;
        }
        else
        {
            milliseconds = BL_DEFAULT_PERIPHERAL_DETECT_TIMEOUT;
        }
        timeoutTicks = milliseconds * ticksPerMillisecond;

        // save how many ticks we're currently at before the detection loop starts
        lastTicks = microseconds_get_ticks();
#if BL_FEATURE_POWERDOWN
        shortTimeout = true;
#endif
    }
#if BL_FEATURE_POWERDOWN
    else
    {
        timeoutTicks = BL_DEFAULT_POWERDOWN_TIMEOUT * ticksPerMillisecond;
        lastTicks = microseconds_get_ticks();
    }
#endif
#endif // !BL_FEATURE_TIMEOUT

    ...///< Remainded codes are omitted.

    return activePeripheral;
}

 The cpu can jump to execute the reset_handler of application,but it will be reseted or go to address 0xdeadbee when copy data segment from FLASH to RAM or init bss segment.

These problem bother me for weeks.

Any suggestion is appreciated.

Best regards.

[jeremyzhou]

Hi ,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
Before answering your question, I was wondering if you can illustrate the testing steps that replicates the issue.
Have a great day,
TIC

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[longxing]

Thanks for your replying.

Following is the detail steps to test flashloader:

(1)Download the Nor Flash Configuration parameters at address 0x60000000。The Flash Configuration parameters are:

#define NOR_CMD_LUT_SEQ_IDX_READ CMD_LUT_SEQ_IDX_READ //!< 0  READ LUT sequence id in lookupTable stored in config block
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS \
    CMD_LUT_SEQ_IDX_READSTATUS //!< 1  Read Status LUT sequence id in lookupTable stored in config block
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \
    2 //!< 2  Read status DPI/QPI/OPI sequence id in lookupTable stored in config block
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE \
    CMD_LUT_SEQ_IDX_WRITEENABLE //!< 3  Write Enable sequence id in lookupTable stored in config block
#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \
    4 //!< 4  Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block
#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5 //!< 5  Erase Sector sequence id in lookupTable stored in config block
#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK  8 //!< 8 Erase Block sequence id in lookupTable stored in config block
#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM \
    CMD_LUT_SEQ_IDX_WRITE                //!< 9  Program sequence id in lookupTable stored in config block
#define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11 //!< 11 Chip Erase sequence in lookupTable id stored in config block
#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13 //!< 13 Read SFDP sequence in lookupTable id stored in config block
#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \
    14 //!< 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block
#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \
    15 //!< 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk

#define NOR_CMD_LUT_SEQ_IDX_READSTATUS1     1 //!< 1  Read Status Register 1 sequence id in lookupTable stored in config block
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS2     2 //!< 2  Read Status Register 2 sequence id in lookupTable stored in config block
#define NOR_CMD_LUT_SEQ_IDX_READSTATUS3     4 //!< 4  Read Status Register 3 sequence id in lookupTable stored in config block
#define NOR_CMD_LUT_SEQ_IDX_WRITESTATUS1    6 //!< 6  Write Status Register 1 sequence id in lookupTable stored in config block
#define NOR_CMD_LUT_SEQ_IDX_WRITESTATUS2    7 //!< 7  Write Status Register 2 sequence id in lookupTable stored in config block
#define NOR_CMD_LUT_SEQ_IDX_WRITESTATUS3    8 //!< 8  Write Status Register 3 sequence id in lookupTable stored in config block
#define NOR_CMD_LUT_SEQ_IDX_READ_UID       12 //!< 12 Read Unique ID sequence in loopupTable id stored in config block

const flexspi_nor_config_t spiflash_config = {
    .memConfig =
        {
            .tag = FLEXSPI_CFG_BLK_TAG,/*��־��FCFB*/
            .version = FLEXSPI_CFG_BLK_VERSION,/*�汾��V1.4.0*/
            .readSampleClksrc=kFlexSPIReadSampleClk_LoopbackInternally,/*�ڲ�����*/
            .csHoldTime = 3u, /*����ʱ��*/
            .csSetupTime = 3u,/*����ʱ��*/
            .columnAddressWidth = 0u,/*�е�ַ���*/
            .deviceModeCfgEnable = 1u,/*�豸ģʽ����ʹ��*/
            .deviceModeType = 1u,/*Quad ʹ������*/
            .deviceModeSeq.seqNum = 1u,/*LUT���к�*/
            .deviceModeSeq.seqId = 4u, /*LUT��������*/
            .deviceModeArg = 0x000200,/*���� QE=1��S9��*/
            .deviceType = kFlexSpiDeviceType_SerialNOR,/*�豸����Ϊnor flash*/
            .sflashPadType = kSerialFlash_4Pads,/*�豸��������Ϊ4*/
            .serialClkFreq = kFlexSpiSerialClk_133MHz,/*flash ʱ��*/
            .sflashA1Size = 32u * 1024u * 1024u,      /*flash ��С32MBytes*/
            //.dataValidTime = {16u, 16u},
            .lookupTable =
                {
				      [4 * NOR_CMD_LUT_SEQ_IDX_READ + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,   FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
				      [4 * NOR_CMD_LUT_SEQ_IDX_READ + 1] = FLEXSPI_LUT_SEQ(MODE8_SDR, FLEXSPI_4PAD, 0xFF, DUMMY_SDR, FLEXSPI_4PAD, 0x04),
				      [4 * NOR_CMD_LUT_SEQ_IDX_READ + 2] = FLEXSPI_LUT_SEQ(READ_SDR,  FLEXSPI_4PAD, 0x04, STOP,      FLEXSPI_1PAD, 0x00),
				      [4 * NOR_CMD_LUT_SEQ_IDX_READ + 3] = 0,

				      // 1th Seq: Read Status Register 1
				      [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUS1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x01),
				      [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUS1 + 1] = FLEXSPI_LUT_SEQ(STOP,    FLEXSPI_1PAD, 0x00, 0, 0, 0),

				      // 2th Seq: Read Status Register 2
				      [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUS2 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x35, READ_SDR, FLEXSPI_1PAD, 0x01),
				      [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUS2 + 1] = FLEXSPI_LUT_SEQ(STOP,    FLEXSPI_1PAD, 0x00, 0, 0, 0),

				      // 3th Seq: Write Enable
				      [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x00),

				      // 4th Seq: Read Status Register 3
				      [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUS3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x15, READ_SDR, FLEXSPI_1PAD, 0x01),
				      [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUS3 + 1] = FLEXSPI_LUT_SEQ(STOP,    FLEXSPI_1PAD, 0x00, 0, 0, 0),

				      // 5th Seq: Sector Erase with 3-Bytes Address
				      [4 * NOR_CMD_LUT_SEQ_IDX_ERASESECTOR + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20, RADDR_SDR, FLEXSPI_1PAD, 0x18),
				      [4 * NOR_CMD_LUT_SEQ_IDX_ERASESECTOR + 1] = FLEXSPI_LUT_SEQ(STOP,    FLEXSPI_1PAD, 0x00, 0, 0, 0),

				      // 6th Seq: Write Status Register 1
				      [4 * NOR_CMD_LUT_SEQ_IDX_WRITESTATUS1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01, WRITE_SDR, FLEXSPI_1PAD, 0x01),
				      [4 * NOR_CMD_LUT_SEQ_IDX_WRITESTATUS1 + 1] = FLEXSPI_LUT_SEQ(STOP,    FLEXSPI_1PAD, 0x00, 0, 0, 0),

				      // 7th Seq: Write Status Register 2
				      [4 * NOR_CMD_LUT_SEQ_IDX_WRITESTATUS2 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x31, WRITE_SDR, FLEXSPI_1PAD, 0x01),
				      [4 * NOR_CMD_LUT_SEQ_IDX_WRITESTATUS2 + 1] = FLEXSPI_LUT_SEQ(STOP,    FLEXSPI_1PAD, 0x00, 0, 0, 0),

				      // 8th Seq: Write Status Register 3
				      [4 * NOR_CMD_LUT_SEQ_IDX_WRITESTATUS3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x11, WRITE_SDR, FLEXSPI_1PAD, 0x01),
				      [4 * NOR_CMD_LUT_SEQ_IDX_WRITESTATUS3 + 1] = FLEXSPI_LUT_SEQ(STOP,    FLEXSPI_1PAD, 0x00, 0, 0, 0),

				      // 9th Seq: Qaud Page Program with 3-Bytes Address
				      [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,  FLEXSPI_1PAD, 0x32, RADDR_SDR, FLEXSPI_1PAD, 0x18),
				      [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM + 1] = FLEXSPI_LUT_SEQ(WRITE_SDR,FLEXSPI_4PAD, 0x04, STOP,      FLEXSPI_1PAD, 0x00),

				      // 10th Seq: 32KB Block Block Erase
				      [4 * NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x52, RADDR_SDR, FLEXSPI_1PAD, 0x18),
				      [4 * NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK + 1] = FLEXSPI_LUT_SEQ(STOP,    FLEXSPI_1PAD, 0x00, 0, 0, 0),

				      // 11th Seq: Chip Erase
				      [4 * NOR_CMD_LUT_SEQ_IDX_CHIPERASE + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xC7, STOP, FLEXSPI_1PAD, 0x00),

				      // 12th Seq: Read Unique ID Number
				      [4 * NOR_CMD_LUT_SEQ_IDX_READ_UID + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,  FLEXSPI_1PAD, 0x4B, DUMMY_SDR, FLEXSPI_1PAD, 0x20),
				      [4 * NOR_CMD_LUT_SEQ_IDX_READ_UID + 1] = FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_1PAD, 0x04, STOP,    FLEXSPI_1PAD, 0x00),

				      // 13th Seq: Read SFDP Register
				      [4 * NOR_CMD_LUT_SEQ_IDX_READ_SFDP + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,   FLEXSPI_1PAD, 0x5A, RADDR_SDR, FLEXSPI_1PAD, 0x18),
				      [4 * NOR_CMD_LUT_SEQ_IDX_READ_SFDP + 1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 0x08, READ_SDR,  FLEXSPI_1PAD, 0x04),
				      [4 * NOR_CMD_LUT_SEQ_IDX_READ_SFDP + 2] = FLEXSPI_LUT_SEQ(STOP,      FLEXSPI_1PAD, 0x00, 0, 0, 0),

                },
        },
    .pageSize = 256u,/*ҳ��СΪ256�ֽ�*/
    .sectorSize = 4u * 1024u,/*������СΪ4k�ֽ�*/
};

(2)Modify the Nor Flash memory map entry in global variable g_memoryMap.

{ 0x60000000, 0x6fffffff, kMemoryNotExecutable | kMemoryType_FLASH, kMemoryFlexSpiNor, &g_flexspiMemoryInterface }

to

{ 0x60000000, 0x6fffffff, kMemoryIsExecutable | kMemoryType_FLASH, kMemoryFlexSpiNor, &g_flexspiMemoryInterface },

（2）Load flashloader  into on chip RAM with J-Link,and then run the code.

(3)Send memory configuring command using blhost.exe.

.\blhost.exe -p COM9,115200 --  configure-memory 9 0x60000000

Flashloader returns:

Ping responded in 1 attempt(s)
Inject command 'configure-memory'
Successful generic response to command 'configure-memory'
Response status = 0 (0x0) Success.

(4)Load new image into Nor Flash.

 .\blhost.exe -p COM9,115200 --  flash-image .\evkbimxrt1050_igpio_led_output.hex erase 9

Flashloader returns:

Ping responded in 1 attempt(s)
Inject command 'flash-image'
Successful generic response to command 'flash-erase-region'
Wrote 17944 bytes to address 0x60010000
Successful generic response to command 'write-memory'
(1/1)100% Completed!
Successful generic response to command 'write-memory'
Response status = 0 (0x0) Success.

 (5)Execute the new image（0x60010305 is reset_isr's address which can be found in map file）:

 .\blhost.exe -p COM9,115200 --  execute 0x60010305 0 0x20020000

flashloade returns:

Ping responded in 1 attempt(s)
Inject command 'execute'
Successful generic response to command 'execute'
Response status = 0 (0x0) Success.

Nothing happened!

The LED didn't flash.

[longxing · Accepted solution]

I found out that it's application image that didn't be correctly load into RAM.so it can not run.

[longxing]

Set a breakpoint at statement

 s_callFunction(s_argument);

in function handle_execute().

The received call-address and stack-pointer are correct.The CPU did go to reset_isr handler.But once fully run,the LED didn't flash.Then halt the program,a message  is shown in disassembly window ,which is:

Failed to execute MI command:
-data-disassemble -s 2147718724 -e 2147718864 -- 2
Error message from debugger back end:
Cannot execute this command while the target is running.
Use the "interrupt" command to stop the target
and then try again.

[jeremyzhou]

Hi @longxing ，
Thanks for your reply.
In my opinion, I guess the problem is related to the configure-memory failing to set up the FlexSPI's LUT command, and you can refer to the post to learn more detailed information.
Have a great day,
TIC

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